| /arch/c6x/include/asm/ |
| H A D | cacheflush.h | 40 #define flush_icache_range(s, e) \ macro
59 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
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| /arch/hexagon/include/asm/ |
| H A D | cacheflush.h | 35 * - flush_icache_range(start, end) flush a range of instructions
52 #undef flush_icache_range macro
53 extern void flush_icache_range(unsigned long start, unsigned long end);
90 flush_icache_range((unsigned long) dst,
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| /arch/hexagon/mm/ |
| H A D | cache.c | 48 void flush_icache_range(unsigned long start, unsigned long end) function
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| /arch/m68k/mm/ |
| H A D | cache.c | 75 void flush_icache_range(unsigned long address, unsigned long endaddr) function
106 EXPORT_SYMBOL(flush_icache_range); variable
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| /arch/mn10300/mm/ |
| H A D | cache-inv-icache.c | 76 * flush_icache_range - Globally flush dcache and invalidate icache for region
84 void flush_icache_range(unsigned long start, unsigned long end) function
129 EXPORT_SYMBOL(flush_icache_range); variable
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| H A D | cache-flush-icache.c | 100 * flush_icache_range - Globally flush dcache and invalidate icache for region
108 void flush_icache_range(unsigned long start, unsigned long end) function
155 EXPORT_SYMBOL(flush_icache_range); variable
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| /arch/blackfin/include/asm/ |
| H A D | cacheflush.h | 40 static inline void flush_icache_range(unsigned start, unsigned end) function
76 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
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| /arch/cris/include/asm/ |
| H A D | cacheflush.h | 19 #define flush_icache_range(start, end) do { } while (0) macro
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| /arch/m32r/include/asm/ |
| H A D | cacheflush.h | 20 #define flush_icache_range(start, end) _flush_cache_copyback_all() macro
26 #define flush_icache_range(start, end) smp_flush_cache_all() macro
41 #define flush_icache_range(start, end) _flush_cache_all() macro
55 #define flush_icache_range(start, end) do { } while (0) macro
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| /arch/powerpc/include/asm/ |
| H A D | cacheflush.h | 34 static inline void flush_icache_range(unsigned long start, unsigned long stop) function
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| /arch/unicore32/include/asm/ |
| H A D | cacheflush.h | 159 #define flush_icache_range(s, e) __cpuc_coherent_kern_range(s, e) macro
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| /arch/alpha/include/asm/ |
| H A D | cacheflush.h | 32 #define flush_icache_range(start, end) imb() macro
34 #define flush_icache_range(start, end) smp_imb() macro
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| /arch/avr32/mm/ |
| H A D | cache.c | 106 void flush_icache_range(unsigned long start, unsigned long end) function
142 flush_icache_range((unsigned long)addr,
160 flush_icache_range((unsigned long)dst,
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| /arch/frv/include/asm/ |
| H A D | cacheflush.h | 71 static inline void flush_icache_range(unsigned long start, unsigned long end) function
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| /arch/h8300/include/asm/ |
| H A D | cacheflush.h | 24 #define flush_icache_range(start,len) macro
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| /arch/m68k/include/asm/ |
| H A D | cacheflush_no.h | 20 #define flush_icache_range(start, len) __flush_icache_all() macro
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| /arch/sparc/include/asm/ |
| H A D | cacheflush_32.h | 54 #define flush_icache_range(start, end) do { } while (0) macro
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| /arch/microblaze/include/asm/ |
| H A D | cacheflush.h | 60 #define flush_icache_range(start, end) mbc->iflr(start, end); macro
98 flush_icache_range((unsigned) (start), (unsigned) (start) + (len)); \
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| /arch/mips/mm/ |
| H A D | cache.c | 32 void (*flush_icache_range)(unsigned long start, unsigned long end); variable
75 flush_icache_range(addr, addr + bytes);
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| /arch/parisc/include/asm/ |
| H A D | cacheflush.h | 87 #define flush_icache_range(s,e) do { \ macro
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| /arch/score/mm/ |
| H A D | cache.c | 205 flush_icache_range(start, tmpend);
219 flush_icache_range(kaddr, kaddr + PAGE_SIZE);
264 void flush_icache_range(unsigned long start, unsigned long end) function
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| /arch/tile/include/asm/ |
| H A D | cacheflush.h | 52 extern void flush_icache_range(unsigned long start, unsigned long end);
54 #define flush_icache_range __flush_icache_range macro
70 flush_icache_range((unsigned long) dst,
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| /arch/xtensa/include/asm/ |
| H A D | cacheflush.h | 127 #define flush_icache_range(start,end) \ macro
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| /arch/arm/include/asm/ |
| H A D | cacheflush.h | 260 #define flush_icache_range(s,e) __cpuc_coherent_kern_range(s,e) macro
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| /arch/mn10300/include/asm/ |
| H A D | cacheflush.h | 136 extern void flush_icache_range(unsigned long start, unsigned long end);
143 extern void flush_icache_range(unsigned long start, unsigned long end);
145 #define flush_icache_range(start, end) do {} while (0) macro
151 flush_icache_range(adr, adr + len)
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