Searched defs:hash (Results 1 - 18 of 18) sorted by relevance

/arch/powerpc/mm/
H A Dhugetlbpage-hash64.c2 * PPC64 Huge TLB Page Support for hash based MMUs (POWER4 and later)
70 unsigned long hash, slot; local
72 hash = hpt_hash(va, shift, ssize);
74 hash = ~hash;
75 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
84 unsigned long hash = hpt_hash(va, shift, ssize); local
90 hpte_group = ((hash & htab_hash_mask) *
103 /* Insert into the hash table, primary slot */
109 hpte_group = ((~hash
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H A Dhash_native_64.c237 DBG_LOW(" update(va=%016lx, avpnv=%016lx, hash=%016lx, newpp=%x)",
265 unsigned long hash; local
270 hash = hpt_hash(va, mmu_psize_defs[psize].shift, ssize);
274 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
328 DBG_LOW(" invalidate(va=%016lx, hash: %x)\n", va, slot);
463 * Batched hash table flush, we batch the tlbie's to avoid taking/releasing
468 unsigned long va, hash, index, hidx, shift, slot; local
486 hash = hpt_hash(va, shift, ssize);
489 hash = ~hash;
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H A Dhash_utils_64.c193 unsigned long hash, hpteg; local
202 hash = hpt_hash(va, shift, ssize);
203 hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
513 /* If hash size isn't already provided by the platform, we try to
680 /* create bolted the linear mapping in the hash table */
767 /* Initialize hash table for that CPU */
905 * -1 - critical hash insertion error
1067 /* Dump some info in case of hash insertion failure, they should
1143 /* Dump some info in case of hash insertion failure, they should
1159 unsigned long hash, inde local
1209 unsigned long hash, hpteg; local
1230 unsigned long hash, hidx, slot; local
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/arch/x86/crypto/
H A Dcrc32c-intel.c31 #include <crypto/internal/hash.h>
88 static int crc32c_intel_setkey(struct crypto_shash *hash, const u8 *key, argument
91 u32 *mctx = crypto_shash_ctx(hash);
94 crypto_shash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
/arch/powerpc/kvm/
H A Dbook3s_32_mmu.c118 u32 page, hash, pteg, htabmask; local
124 hash = ((sr_vsid(sre) ^ page) << 6);
126 hash = ~hash;
127 hash &= htabmask;
129 pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;
H A Dbook3s_32_mmu_host.c76 * a hash, so we don't waste cycles on looping */
120 u32 page, hash; local
125 hash = ((vsid ^ page) << 6);
127 hash = ~hash;
129 hash &= htabmask;
131 pteg |= hash;
133 dprintk_mmu("htab: %lx | hash: %x | htabmask: %x | pteg: %lx\n",
134 htab, hash, htabmask, pteg);
H A Dbook3s_64_mmu.c111 u64 hash, pteg, htabsize; local
118 hash = slbe->vsid ^ page;
120 hash = ~hash;
121 hash &= ((1ULL << 39ULL) - 1ULL);
122 hash &= htabsize;
123 hash <<= 7ULL;
126 pteg |= hash;
H A Dbook3s_64_mmu_host.c42 * a hash, so we don't waste cycles on looping */
84 ulong hash, hpteg, va; local
130 hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M);
133 hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
146 hash = ~hash;
158 hash = ~hash;
159 hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
H A Dbook3s_hv_rm_mmu.c658 unsigned long vsid, hash; local
664 /* Get page shift, work out hash and AVPN etc. */
681 hash = (vsid ^ ((eaddr & somask) >> pshift)) & HPT_HASH_MASK;
692 hpte = (unsigned long *)(kvm->arch.hpt_virt + (hash << 7));
698 /* Check valid/absent, hash, segment size and AVPN */
717 return (hash << 3) + (i >> 1);
726 hash = hash ^ HPT_HASH_MASK;
H A Dbook3s_64_mmu_hv.c125 unsigned long addr, hash; local
148 hash = (i ^ (VRMA_VSID ^ (VRMA_VSID << 25))) & HPT_HASH_MASK;
150 * We assume that the hash table is empty and no
155 hash = (hash << 3) + 7;
158 ret = kvmppc_virtmode_h_enter(vcpu, H_EXACT, hash, hp_v, hp_r);
396 /* Find the HPTE in the hash table */
489 * Emulated accesses are emulated by looking at the hash for
/arch/powerpc/platforms/cell/
H A Dbeat_htab.c225 unsigned long hash; local
230 hash = hpt_hash(va, mmu_psize_defs[psize].shift, MMU_SEGSIZE_256M);
234 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
248 hash = ~hash;
/arch/sparc/mm/
H A Dtsb.c40 unsigned long hash = tsb_hash(v, PAGE_SHIFT, local
42 struct tsb *ent = &swapper_tsb[hash];
56 unsigned long tag, ent, hash; local
60 hash = tsb_hash(v, hash_shift, nentries);
61 ent = tsb + (hash * sizeof(struct tsb));
/arch/x86/kernel/
H A Dtboot.c374 u8 hash[SHA1_SIZE]; member in struct:sha1_hash
/arch/powerpc/platforms/pseries/
H A Dlpar.c22 /* Enables debugging of low-level hash table routines - careful! */
262 pr_devel(" update: avpnv=%016lx, hash=%016lx, f=%lx, psize: %d ...",
300 unsigned long hash; local
305 hash = hpt_hash(va, mmu_psize_defs[psize].shift, ssize);
309 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
391 unsigned long hash, index, shift, hidx, slot; local
405 hash = hpt_hash(va, shift, ssize);
408 hash = ~hash;
409 slot = (hash
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/arch/powerpc/include/asm/
H A Dmmu-hash64.h236 unsigned long hash, vsid; local
239 hash = (va >> 28) ^ ((va & 0x0fffffffUL) >> shift);
242 hash = vsid ^ (vsid << 25) ^ ((va & 0xffffffffffUL) >> shift);
244 return hash & 0x7fffffffffUL;
295 * multiplicative hash:
318 * - The scramble function gives robust scattering in the hash
321 * hash collisions.
/arch/ia64/kernel/
H A Dunwind.c112 /* hash table that maps instruction pointer to script index: */
113 unsigned short hash[UNW_HASH_SIZE]; member in struct:__anon1843
227 .hash = { [0 ... UNW_HASH_SIZE - 1] = -1 },
1207 hash (unsigned long ip)
1246 index = unw.hash[hash(ip)];
1298 /* remove the old script from the hash table (if it's there): */
1300 index = hash(script->ip);
1301 tmp = unw.cache + unw.hash[index];
1308 unw.hash[inde
1204 hash (unsigned long ip) function
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/arch/ia64/include/asm/
H A Dkvm_host.h362 struct thash_data *hash; /* hash table pointer */ member in struct:thash_cb
/arch/mips/include/asm/txx9/
H A Dtx4939.h143 } hash; member in union:tx4939_crypto_reg::__anon2227

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