/arch/arm/plat-s3c24xx/ |
H A D | clock.c | 49 unsigned long hclk, 56 clk_h.rate = hclk; 48 s3c24xx_setup_clocks(unsigned long fclk, unsigned long hclk, unsigned long pclk) argument
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H A D | s3c2412-iotiming.c | 100 unsigned int hclk = cfg->freq.hclk_tns; local 103 bt->smbidcyr = calc_timing(bt->idcy, hclk, &err); 104 bt->smbwstrd = calc_timing(bt->wstrd, hclk, &err); 105 bt->smbwstwr = calc_timing(bt->wstwr, hclk, &err); 106 bt->smbwstoen = calc_timing(bt->wstoen, hclk, &err); 107 bt->smbwstwen = calc_timing(bt->wstwen, hclk, &err); 108 bt->smbwstbrd = calc_timing(bt->wstbrd, hclk, &err); 279 refresh = (cfg->freq.hclk / 100) * (board->refresh / 10);
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H A D | s3c2410-iotiming.c | 111 s3c_freq_iodbg("%s: cyc=%d, hclk=%lu, shift=%d => div %d\n", 136 int calc_tacp(unsigned int cyc, unsigned long hclk, unsigned long *v) argument 159 s3c_freq_iodbg("%s: cyc=%u, nwait=%d, hclk=%lu => div=%u\n", 220 unsigned long hclk = cfg->freq.hclk_tns; local 234 ret = calc_0124(bt->tacs, hclk, &res, S3C2410_BANKCON_Tacs_SHIFT); 235 ret |= calc_0124(bt->tcos, hclk, &res, S3C2410_BANKCON_Tcos_SHIFT); 236 ret |= calc_0124(bt->tcah, hclk, &res, S3C2410_BANKCON_Tcah_SHIFT); 237 ret |= calc_0124(bt->tcoh, hclk, &res, S3C2410_BANKCON_Tcoh_SHIFT); 242 ret |= calc_tacp(bt->tacp, hclk, &res); 243 ret |= calc_tacc(bt->tacc, bt->nwait_en, hclk, 299 unsigned long hclk = cfg->freq.hclk_tns; local 320 unsigned long hclk = cfg->freq.hclk_tns; local [all...] |
H A D | cpu-freq.c | 67 unsigned long fclk, pclk, hclk, armclk; local 70 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk); 77 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); 79 cfg->divs.h_divisor = fclk / hclk; 88 cfg->freq.hclk = pll / cfg->divs.h_divisor; 91 /* convert hclk into 10ths of nanoseconds for io calcs */ 92 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); 108 cfg->freq.hclk, cfg->divs.h_divisor, 194 if (cpu_new.freq.hclk ! [all...] |
/arch/avr32/mach-at32ap/ |
H A D | pdc.c | 16 struct clk *pclk, *hclk; local 23 hclk = clk_get(&pdev->dev, "hclk"); 24 if (IS_ERR(hclk)) { 25 dev_err(&pdev->dev, "no hclk defined\n"); 27 return PTR_ERR(hclk); 31 clk_enable(hclk);
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/arch/arm/mach-s3c2410/ |
H A D | cpu-freq.c | 50 unsigned long hclk, fclk, pclk; local 55 hclk_max = cfg->max.hclk; 59 s3c_freq_dbg("%s: fclk is %lu, max hclk %lu\n", 62 hdiv = (fclk > cfg->max.hclk) ? 2 : 1; 63 hclk = fclk / hdiv; 65 if (hclk > cfg->max.hclk) { 66 s3c_freq_dbg("%s: hclk too big\n", __func__); 70 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; 71 pclk = hclk / pdi [all...] |
/arch/arm/mach-s3c2412/ |
H A D | cpu-freq.c | 38 static struct clk *hclk; variable in typeref:struct:clk 46 unsigned long hclk, fclk, armclk, armdiv_clk; local 51 hclk_max = cfg->max.hclk; 53 /* We can't run hclk above armclk as at the best we have to 54 * have armclk and hclk in dvs mode. */ 63 cfg->freq.hclk, cfg->freq.pclk); 79 cfg->freq.hclk = hclk = armdiv_clk / hdiv; 85 cfg->freq.armclk = dvs ? hclk : armdiv_clk; 87 s3c_freq_dbg("%s: armclk %lu, hclk [all...] |
/arch/arm/mach-s3c24xx/ |
H A D | s3c2410.c | 89 unsigned long hclk; local 105 hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1); 106 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1); 111 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); 117 s3c24xx_setup_clocks(fclk, hclk, pclk);
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H A D | s3c2412.c | 179 unsigned long hclk; local 197 hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1); 198 hclk /= ((tmp & S3C2412_CLKDIVN_ARMDIVN) ? 2 : 1); 199 pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1); 204 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); 206 s3c24xx_setup_clocks(fclk, hclk, pclk);
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H A D | s3c244x.c | 86 unsigned long hclk, fclk, pclk; local 118 hclk = fclk / hdiv; 119 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1); 124 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); 126 s3c24xx_setup_clocks(fclk, hclk, pclk);
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/arch/arm/plat-samsung/include/plat/ |
H A D | cpu-freq.h | 25 * @hclk: The HCLK frequency in Hz. 39 unsigned long hclk; member in struct:s3c_freq
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/arch/arm/mach-mv78xx0/ |
H A D | common.c | 48 int hclk; local 55 hclk = 166666667; 58 hclk = 200000000; 61 hclk = 266666667; 64 hclk = 333333333; 67 hclk = 400000000; 74 return hclk; 77 static void get_pclk_l2clk(int hclk, int core_index, int *pclk, int *l2clk) argument 95 *pclk = ((u64)hclk * (2 + (cfg & 0xf))) >> 1; 378 int hclk; local [all...] |
/arch/arm/mach-s3c2440/ |
H A D | s3c2440-cpufreq.c | 39 static struct clk *hclk; variable in typeref:struct:clk 62 unsigned long hclk, fclk, armclk; local 67 hclk_max = cfg->max.hclk; 69 s3c_freq_dbg("%s: fclk is %lu, armclk %lu, max hclk %lu\n", 85 hclk = (fclk / hdiv); 86 if (hclk <= hclk_max || within_khz(hclk, hclk_max)) 90 s3c_freq_dbg("%s: hclk %lu, div %d\n", __func__, hclk, hdiv); 95 pdiv = (hclk > cf [all...] |
/arch/arm/mach-s5p64x0/ |
H A D | clock-s5p6440.c | 535 unsigned long hclk; local 572 hclk = clk_get_rate(&clk_hclk.clk); 579 print_mhz(hclk), print_mhz(hclk_low), 583 clk_h.rate = hclk;
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H A D | clock-s5p6450.c | 601 unsigned long hclk; local 643 hclk = clk_get_rate(&clk_hclk.clk); 650 print_mhz(hclk), print_mhz(hclk_low), 654 clk_h.rate = hclk;
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/arch/arm/mach-imx/ |
H A D | clock-imx1.c | 232 * get hclk ( SDRAM, CSI, Memory Stick, I2C, DMA ) 268 static struct clk hclk = { variable in typeref:struct:clk 451 &hclk, 487 .parent = &hclk, 497 .parent = &hclk, 507 .parent = &hclk, 539 .parent = &hclk, 563 .parent = &hclk, 629 clk_enable(&hclk);
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/arch/arm/mach-s3c64xx/ |
H A D | clock.c | 874 unsigned long hclk; local 916 hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); 920 hclk2, hclk, pclk); 927 clk_h.rate = hclk;
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