/arch/tile/include/hv/ |
H A D | drv_pcie_rc_intf.h | 34 int intr; /**< interrupt number used for downcall */ member in struct:pcie_rc_config
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/arch/ia64/hp/sim/ |
H A D | hpsim_irq.c | 50 static void hpsim_connect_irq(int intr, int irq) argument 52 ia64_ssc(intr, irq, 0, 0, SSC_CONNECT_INTERRUPT); 55 int hpsim_get_irq(int intr) argument 62 hpsim_connect_irq(intr, irq);
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/arch/mips/pci/ |
H A D | ops-gt64xxx_pci0.c | 46 u32 intr; local 83 intr = GT_READ(GT_INTRCAUSE_OFS); 85 if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {
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H A D | ops-msc.c | 51 u32 intr; local 70 MSC_READ(MSC01_PCI_INTSTAT, intr); 71 if (intr & (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT)) {
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H A D | ops-pmcmsp.c | 136 int intr; local 169 intr = preg->if_status; 385 unsigned long intr; local 461 intr = preg->if_status; 467 if (intr & ~(BPCI_IFSTATUS_BC0F | BPCI_IFSTATUS_BC1F)) {
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/arch/cris/include/arch-v32/arch/hwregs/ |
H A D | dma.h | 22 unsigned intr : 1; member in struct:dma_descr_group 40 unsigned intr : 1; member in struct:dma_descr_context 62 unsigned intr : 1; member in struct:dma_descr_data
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H A D | dma_defs.h | 107 unsigned int intr : 1; member in struct:__anon504 158 unsigned int intr : 1; member in struct:__anon508 258 unsigned int intr : 1; member in struct:__anon512
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/arch/powerpc/platforms/52xx/ |
H A D | mpc52xx_pm.c | 19 static struct mpc52xx_intr __iomem *intr; variable in typeref:struct:__iomem 88 intr = mbar + 0x500; 122 intr_main_mask = in_be32(&intr->main_mask); 123 out_be32(&intr->main_mask, intr_main_mask | 0x1ffff); 156 mpc52xx_deep_sleep(sram, sdram, cdm, intr); 175 out_be32(&intr->main_mask, intr_main_mask);
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H A D | mpc52xx_pic.c | 133 static struct mpc52xx_intr __iomem *intr; variable in typeref:struct:__iomem 161 io_be_clrbit(&intr->ctrl, 11 - l2irq); 167 io_be_setbit(&intr->ctrl, 11 - l2irq); 173 io_be_setbit(&intr->ctrl, 27-l2irq); 194 ctrl_reg = in_be32(&intr->ctrl); 197 out_be32(&intr->ctrl, ctrl_reg); 223 io_be_setbit(&intr->main_mask, 16 - l2irq); 229 io_be_clrbit(&intr->main_mask, 16 - l2irq); 246 io_be_setbit(&intr->per_mask, 31 - l2irq); 252 io_be_clrbit(&intr [all...] |
/arch/sparc/kernel/ |
H A D | prom_32.c | 139 unsigned int *intr, *device, *vendor, reg0; local 157 intr = &interrupt; /* IRQ0 does not exist */ 159 intr = prop->value; 172 *intr, reg0);
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H A D | of_device_32.c | 342 const struct linux_prom_irqs *intr; local 354 intr = of_get_property(dp, "intr", &len); 355 if (intr) { 359 sparc_irq_config.build_device_irq(op, intr[i].pri);
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/arch/mips/kernel/ |
H A D | irq-gic.c | 24 void gic_send_ipi(unsigned int intr) argument 28 GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), 0x80000000 | intr); local 163 static void __init gic_setup_intr(unsigned int intr, unsigned int cpu, argument 169 GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_MAP_TO_PIN(intr)), pin); 173 GIC_SH_MAP_TO_VPE_REG_OFF(intr, cpu)), 177 GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_MAP_TO_PIN(intr)), 180 GIC_SH_MAP_TO_VPE_SMASK(intr, cpu); 184 GIC_SET_POLARITY(intr, polarity); 187 GIC_SET_TRIGGER(intr, trigtype); 190 GIC_CLR_INTR_MASK(intr); [all...] |
/arch/x86/kvm/ |
H A D | pmu.c | 163 bool intr) 180 intr ? kvm_perf_overflow_intr : 161 reprogram_counter(struct kvm_pmc *pmc, u32 type, unsigned config, bool exclude_user, bool exclude_kernel, bool intr) argument
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/arch/cris/arch-v32/drivers/mach-a3/ |
H A D | gpio.c | 200 int intr = bit % 8; local 208 intr_cfg |= (regk_gio_hi << (intr * 3)); 209 mask |= 1 << intr; 211 pins |= pin << (intr * 4); 213 intr_cfg |= (regk_gio_lo << (intr * 3)); 214 mask |= 1 << intr; 216 pins |= pin << (intr * 4);
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/arch/mips/mti-malta/ |
H A D | malta-int.c | 456 int intr = baseintr + cpu; local 457 gic_intr_map[intr].cpunum = cpu; 458 gic_intr_map[intr].pin = cpupin; 459 gic_intr_map[intr].polarity = GIC_POL_POS; 460 gic_intr_map[intr].trigtype = GIC_TRIG_EDGE; 461 gic_intr_map[intr].flags = GIC_FLAG_IPI;
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/arch/mn10300/kernel/ |
H A D | mn10300-serial.c | 1683 u8 intr, tmp; local 1691 intr = *port->_intr; 1692 *port->_intr = intr & ~SC01ICR_TI; 1706 *port->_intr = intr;
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/arch/powerpc/sysdev/ |
H A D | cpm1.c | 293 __be16 dir, par, odr_sor, dat, intr; member in struct:cpm_ioport16
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/arch/x86/platform/mrst/ |
H A D | mrst.c | 422 int intr = get_gpio_by_name("max3111_int"); local 425 if (intr == -1) 427 spi_info->irq = intr + MRST_IRQ_OFFSET; 439 int gpio_base, intr; local 461 intr = get_gpio_by_name(intr_pin_name); 466 if (intr != -1) { 467 i2c_info->irq = intr + MRST_IRQ_OFFSET; 480 int gpio_base, intr; local 489 intr = get_gpio_by_name(intr_pin_name); 494 if (intr ! 507 int intr = get_gpio_by_name("mpu3050_int"); local 520 int intr = get_gpio_by_name("thermal_int"); local 536 int intr = get_gpio_by_name("accel_int"); local [all...] |
/arch/ia64/include/asm/sn/ |
H A D | sn_sal.h | 409 ia64_sn_console_intr_enable(u64 intr) argument 418 intr, SAL_CONSOLE_INTR_ON, 426 ia64_sn_console_intr_disable(u64 intr) argument 435 intr, SAL_CONSOLE_INTR_OFF, 873 * Enable the interrupt indicated by the intr parameter (either 877 ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr) argument 881 (u64) nasid, (u64) subch, intr, 0, 0, 0); 886 * Disable the interrupt indicated by the intr parameter (either 890 ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr) argument 894 (u64) nasid, (u64) subch, intr, [all...] |
/arch/mips/include/asm/octeon/ |
H A D | cvmx-ipd-defs.h | 627 uint64_t intr:64; member in struct:cvmx_ipd_port_qos_intx::cvmx_ipd_port_qos_intx_s
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H A D | cvmx-ciu-defs.h | 1877 uint64_t intr:2; member in struct:cvmx_ciu_pci_inta::cvmx_ciu_pci_inta_s
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H A D | cvmx-pci-defs.h | 1304 uint32_t intr:6; member in struct:cvmx_pci_msi_rcv::cvmx_pci_msi_rcv_s
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H A D | cvmx-sli-defs.h | 1123 uint64_t intr:64; member in struct:cvmx_sli_msi_rcv0::cvmx_sli_msi_rcv0_s 1136 uint64_t intr:64; member in struct:cvmx_sli_msi_rcv1::cvmx_sli_msi_rcv1_s 1149 uint64_t intr:64; member in struct:cvmx_sli_msi_rcv2::cvmx_sli_msi_rcv2_s 1162 uint64_t intr:64; member in struct:cvmx_sli_msi_rcv3::cvmx_sli_msi_rcv3_s 1310 uint64_t intr:8; member in struct:cvmx_sli_pcie_msi_rcv::cvmx_sli_pcie_msi_rcv_s 1324 uint64_t intr:8; member in struct:cvmx_sli_pcie_msi_rcv_b1::cvmx_sli_pcie_msi_rcv_b1_s 1339 uint64_t intr:8; member in struct:cvmx_sli_pcie_msi_rcv_b2::cvmx_sli_pcie_msi_rcv_b2_s 1354 uint64_t intr:8; member in struct:cvmx_sli_pcie_msi_rcv_b3::cvmx_sli_pcie_msi_rcv_b3_s
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H A D | cvmx-sriox-defs.h | 477 uint64_t intr:1; member in struct:cvmx_sriox_int_info2::cvmx_sriox_int_info2_s
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H A D | cvmx-npei-defs.h | 1724 uint64_t intr:64; member in struct:cvmx_npei_msi_rcv0::cvmx_npei_msi_rcv0_s 1735 uint64_t intr:64; member in struct:cvmx_npei_msi_rcv1::cvmx_npei_msi_rcv1_s 1746 uint64_t intr:64; member in struct:cvmx_npei_msi_rcv2::cvmx_npei_msi_rcv2_s 1757 uint64_t intr:64; member in struct:cvmx_npei_msi_rcv3::cvmx_npei_msi_rcv3_s 1882 uint64_t intr:8; member in struct:cvmx_npei_pcie_msi_rcv::cvmx_npei_pcie_msi_rcv_s 1894 uint64_t intr:8; member in struct:cvmx_npei_pcie_msi_rcv_b1::cvmx_npei_pcie_msi_rcv_b1_s 1907 uint64_t intr:8; member in struct:cvmx_npei_pcie_msi_rcv_b2::cvmx_npei_pcie_msi_rcv_b2_s 1920 uint64_t intr:8; member in struct:cvmx_npei_pcie_msi_rcv_b3::cvmx_npei_pcie_msi_rcv_b3_s
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