Searched defs:regval (Results 1 - 25 of 89) sorted by relevance

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/drivers/mfd/
H A Dtps6105x.c69 u8 regval; local
77 regval = ret;
78 regval = (~bitmask & regval) | (bitmask & bitvalues);
79 ret = i2c_smbus_write_byte_data(tps6105x->client, reg, regval);
92 u8 regval; local
94 ret = tps6105x_get(tps6105x, TPS6105X_REG_0, &regval);
97 switch (regval >> TPS6105X_REG0_MODE_SHIFT) {
H A Dtwl4030-madc.c636 u8 regval; local
639 &regval, TWL4030_BCI_BCICTL1);
646 regval |= chan ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN;
648 regval &= chan ? ~TWL4030_BCI_ITHEN : ~TWL4030_BCI_TYPEN;
650 regval, TWL4030_BCI_BCICTL1);
668 u8 regval; local
672 &regval, TWL4030_MADC_CTRL1);
679 regval |= TWL4030_MADC_MADCON;
681 regval &= ~TWL4030_MADC_MADCON;
682 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, regval, TWL4030_MADC_CTRL
700 u8 regval; local
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/drivers/rapidio/switches/
H A Didtcps.c108 u32 regval; local
114 IDTCPS_RIO_DOMAIN, &regval);
116 *sw_domain = (u8)(regval & 0xff);
H A Dtsi568.c116 u32 regval; local
124 rio_read_config_32(rdev, TSI568_SP_MODE(portnum), &regval);
126 regval | TSI568_SP_MODE_PW_DIS);
H A Dtsi57x.c123 u32 regval; local
131 TSI578_SP_MODE_GLBL, &regval);
133 regval & ~TSI578_SP_MODE_LUT_512);
145 u32 regval; local
151 TSI578_GLBL_ROUTE_BASE, &regval);
153 *sw_domain = (u8)(regval >> 24);
161 u32 regval; local
170 TSI578_SP_MODE(portnum), &regval);
173 regval & ~TSI578_SP_MODE_PW_DIS);
179 &regval);
220 u32 regval; local
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H A Didt_gen2.c200 u32 regval; local
206 IDT_RIO_DOMAIN, &regval);
208 *sw_domain = (u8)(regval & 0xff);
216 u32 regval; local
241 rio_read_config_32(rdev, IDT_DEV_CTRL_1, &regval);
243 regval | IDT_DEV_CTRL_1_GENPW | IDT_DEV_CTRL_1_PRSTBEH);
259 rio_read_config_32(rdev, IDT_PORT_OPS(i), &regval);
261 IDT_PORT_OPS(i), regval | IDT_PORT_OPS_GENPW |
281 rio_read_config_32(rdev, IDT_LANE_CTRL(i), &regval);
283 regval | IDT_LANE_CTRL_GENP
325 u32 regval, em_perrdet, em_ltlerrdet; local
374 u32 regval; local
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/drivers/regulator/
H A Dtps6105x-regulator.c63 u8 regval; local
66 ret = tps6105x_get(tps6105x, TPS6105X_REG_0, &regval);
69 regval &= TPS6105X_REG0_MODE_MASK;
70 regval >>= TPS6105X_REG0_MODE_SHIFT;
72 if (regval == TPS6105X_REG0_MODE_VOLTAGE)
81 u8 regval; local
84 ret = tps6105x_get(tps6105x, TPS6105X_REG_0, &regval);
88 regval &= TPS6105X_REG0_VOLTAGE_MASK;
89 regval >>= TPS6105X_REG0_VOLTAGE_SHIFT;
90 return (int) regval;
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H A Dab8500.c158 u8 regval; local
166 info->update_bank, info->update_reg, &regval);
177 info->update_mask, regval); local
179 if (regval & info->update_mask)
208 u8 regval; local
216 info->voltage_bank, info->voltage_reg, &regval);
227 info->voltage_mask, regval); local
230 val = regval & info->voltage_mask;
259 u8 regval; local
277 regval
289 info->voltage_mask, regval); local
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/drivers/staging/iio/
H A Diio_simple_dummy.c46 * @regval: register value - magic device specific numbers.
51 int regval; /* what would be written to hardware */ member in struct:iio_dummy_accel_calibscale
/drivers/hwmon/
H A Dk10temp.c60 u32 regval; local
63 REG_REPORTED_TEMPERATURE, &regval); local
64 return sprintf(buf, "%u\n", (regval >> 21) * 125);
78 u32 regval; local
82 REG_HARDWARE_THERMAL_CONTROL, &regval); local
83 value = ((regval >> 16) & 0x7f) * 500 + 52000;
85 value -= ((regval >> 24) & 0xf) * 500;
H A Dltc4215.c81 const u8 regval = data->regs[reg]; local
87 voltage = regval * 151 / 1000;
91 voltage = regval * 605 / 10;
98 voltage = regval * 482 * 125 / 1000;
H A Dltc4245.c177 const u8 regval = data->vregs[reg - 0x10]; local
183 voltage = regval * 55;
187 voltage = regval * 22;
191 voltage = regval * 15;
195 voltage = regval * -55;
198 voltage = regval * 10;
213 const u8 regval = data->vregs[reg - 0x10]; local
234 voltage = regval * 250; /* voltage in uV */
238 voltage = regval * 125; /* voltage in uV */
242 voltage = regval * 12
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/drivers/net/phy/
H A Dmicrel.c106 int regval; local
109 regval = phy_read(phydev, MII_KSZPHY_CTRL);
110 regval |= KSZ8051_RMII_50MHZ_CLK;
111 phy_write(phydev, MII_KSZPHY_CTRL, regval);
/drivers/rtc/
H A Drtc-ab3100.c205 u8 regval; local
210 AB3100_RTC, &regval);
216 if ((regval & 0xFE) != RTC_SETTING) {
218 regval);
221 if ((regval & 1) == 0) {
226 regval = 1 | RTC_SETTING;
228 AB3100_RTC, regval);
/drivers/sbus/char/
H A Ddisplay7seg.c90 u8 regval = 0; local
92 regval = readb(p->regs);
94 regval |= D7S_FLIP;
96 regval &= ~D7S_FLIP;
97 writeb(regval, p->regs);
/drivers/staging/iio/dds/
H A Dad9832.c36 unsigned long regval; local
41 regval = ad9832_calc_freqreg(st->mclk, fout);
45 ((regval >> 24) & 0xFF));
48 ((regval >> 16) & 0xFF));
51 ((regval >> 8) & 0xFF));
54 ((regval >> 0) & 0xFF));
H A Dad9834.c38 unsigned long regval; local
43 regval = ad9834_calc_freqreg(st->mclk, fout);
45 st->freq_data[0] = cpu_to_be16(addr | (regval &
47 st->freq_data[1] = cpu_to_be16(addr | ((regval >>
/drivers/i2c/muxes/
H A Dpca954x.c153 u8 regval; local
158 regval = chan | chip->enable;
160 regval = 1 << chan;
163 if (data->last_chan != regval) {
164 ret = pca954x_reg_write(adap, client, regval);
165 data->last_chan = regval;
/drivers/net/wireless/ath/ath5k/
H A Dreset.c448 u32 regval; local
476 regval = ioread32(reg);
477 iowrite32(regval | val, reg);
478 regval = ioread32(reg);
482 iowrite32(regval & ~val, reg);
483 regval = ioread32(reg);
/drivers/net/wireless/ath/ath9k/
H A Dar9002_phy.c527 u32 regval; local
529 regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
530 antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >>
532 antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >>
534 antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >>
543 u32 regval; local
545 regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
546 regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF |
549 regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S)
551 regval |
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/drivers/net/wireless/rtlwifi/rtl8192ce/
H A Dphy.c92 u16 regval; local
97 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
99 regval | BIT(13) | BIT(0) | BIT(1));
/drivers/net/wireless/rtlwifi/rtl8192cu/
H A Dphy.c122 u16 regval; local
126 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
127 rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, regval | BIT(13) |
/drivers/watchdog/
H A Dts72xx_wdt.c44 * @regval: watchdog timeout value suitable for control register
52 int regval; member in struct:ts72xx_wdt
88 int regval; member in struct:__anon5982
113 return ts72xx_wdt_map[i].regval;
121 * @regval: control register value to be converted
123 * Function converts given @regval to timeout in seconds (1, 2, 4 or 8).
124 * If @regval cannot be converted, function returns %-EINVAL.
126 static int regval_to_timeout(int regval) argument
131 if (ts72xx_wdt_map[i].regval == regval)
184 int regval; local
347 int regval; local
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/drivers/media/video/
H A Dstk-webcam.h88 struct regval { struct
/drivers/rapidio/
H A Drio-scan.c313 u32 regval; local
327 &regval);
330 ext_ftr_ptr + RIO_PORT_N_CTL_CSR(port_num), &regval) < 0)
334 if (regval & RIO_PORT_N_CTL_P_TYP_SER) {
336 regval = regval | RIO_PORT_N_CTL_EN_RX_SER
340 regval = regval | RIO_PORT_N_CTL_EN_RX_PAR
346 RIO_PORT_N_CTL_CSR(0), regval);
349 ext_ftr_ptr + RIO_PORT_N_CTL_CSR(port_num), regval) <
756 u32 regval; local
932 u32 regval; local
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