Searched defs:val (Results 126 - 150 of 819) sorted by relevance

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/arch/arm/include/asm/
H A Dfutex.h47 u32 val; local
62 : "=&r" (ret), "=&r" (val)
67 *uval = val;
92 u32 val; local
103 : "+r" (ret), "=&r" (val)
107 *uval = val;
/arch/arm/mach-at91/
H A Dsam9_smc.c76 u32 val = __raw_readl(base + AT91_SMC_MODE); local
78 config->mode = (val & ~AT91_SMC_NWECYCLE);
79 config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;
91 u32 val; local
94 val = __raw_readl(base + AT91_SMC_SETUP);
96 config->nwe_setup = val & AT91_SMC_NWESETUP;
97 config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;
98 config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;
99 config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;
102 val
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/arch/arm/mach-davinci/
H A Dpm.c41 unsigned val; local
46 val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
47 val &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN);
48 __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
53 val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
54 val |= PLLCTL_PLLPWRDN;
55 __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
59 val = __raw_readl(pdata->deepsleep_reg);
60 val &= ~DEEPSLEEP_SLEEPCOUNT_MASK,
61 val |
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/arch/arm/mach-iop33x/
H A Dirq.c25 static void intctl0_write(u32 val) argument
27 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
30 static void intctl1_write(u32 val) argument
32 asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val));
35 static void intstr0_write(u32 val) argument
37 asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val));
40 static void intstr1_write(u32 val) argument
42 asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val));
45 static void intbase_write(u32 val) argument
47 asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val));
50 intsize_write(u32 val) argument
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/arch/arm/mach-mxs/
H A Dmach-m28evk.c247 u32 val; local
258 val = ocotp[i];
262 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
263 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
264 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
/arch/arm/mach-netx/
H A Dnxdb500.c72 unsigned int val; local
78 val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
79 writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
83 val = readl(NETX_PIO_OUTPIO);
84 writel(val | 1, NETX_PIO_OUTPIO);
86 val = readl(NETX_PIO_OEPIO);
87 writel(val | 1, NETX_PIO_OEPIO);
H A Dnxeb500hmi.c72 unsigned int val; local
78 val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
79 writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
86 val = readl(NETX_PIO_OUTPIO);
87 writel(val | 1, NETX_PIO_OUTPIO);
89 val = readl(NETX_PIO_OEPIO);
90 writel(val | 1, NETX_PIO_OEPIO);
/arch/arm/mach-omap1/
H A Dams-delta-fiq.c89 unsigned long val, offset; local
116 val = omap_readl(DEFERRED_FIQ_IH_BASE + offset) & ~(1 << 1);
117 omap_writel(val, DEFERRED_FIQ_IH_BASE + offset);
156 val = omap_readl(OMAP_IH1_BASE + offset) | 1;
157 omap_writel(val, OMAP_IH1_BASE + offset);
/arch/arm/mach-omap2/
H A Dsdrc.h32 static inline void sdrc_write_reg(u32 val, u16 reg) argument
34 __raw_writel(val, OMAP_SDRC_REGADDR(reg));
44 static inline void sms_write_reg(u32 val, u16 reg) argument
46 __raw_writel(val, OMAP_SMS_REGADDR(reg));
/arch/arm/mach-prima2/
H A Drtciobrg.c67 unsigned long flags, val; local
71 val = __sirfsoc_rtc_iobrg_readl(addr);
75 return val;
79 void sirfsoc_rtc_iobrg_pre_writel(u32 val, u32 addr) argument
86 writel_relaxed(val, sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_DATA);
89 void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr) argument
95 sirfsoc_rtc_iobrg_pre_writel(val, addr);
/arch/arm/mach-rpc/
H A Dirq.c12 unsigned int val, mask; local
15 val = iomd_readb(IOMD_IRQMASKA);
16 iomd_writeb(val & ~mask, IOMD_IRQMASKA);
22 unsigned int val, mask; local
25 val = iomd_readb(IOMD_IRQMASKA);
26 iomd_writeb(val & ~mask, IOMD_IRQMASKA);
31 unsigned int val, mask; local
34 val = iomd_readb(IOMD_IRQMASKA);
35 iomd_writeb(val | mask, IOMD_IRQMASKA);
46 unsigned int val, mas local
55 unsigned int val, mask; local
70 unsigned int val, mask; local
79 unsigned int val, mask; local
94 unsigned int val, mask; local
103 unsigned int val, mask; local
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/arch/arm/mach-ux500/
H A Dplatsmp.c41 static void write_pen_release(int val) argument
43 pen_release = val;
/arch/arm/plat-spear/
H A Dpadmux.c45 u32 val; local
52 val = readl(pmx->base + pmx->mode_reg.offset);
53 val &= ~pmx->mode_reg.mask;
54 val |= mode->mask & pmx->mode_reg.mask;
55 writel(val, pmx->base + pmx->mode_reg.offset);
74 u32 val, i, mask; local
79 val = readl(pmx->base + pmx->mux_reg.offset);
108 val &= ~mask;
110 val |= mask;
114 writel(val, pm
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/arch/avr32/include/asm/
H A Dcmpxchg.h22 static inline unsigned long xchg_u32(u32 val, volatile u32 *m) argument
26 asm volatile("xchg %[ret], %[m], %[val]"
28 : "m"(*m), [m] "r"(m), [val] "r"(val)
/arch/avr32/kernel/
H A Docd.c93 static int ocd_DC_get(void *data, u64 *val) argument
95 *val = ocd_read(DC);
98 static int ocd_DC_set(void *data, u64 val) argument
100 ocd_write(DC, val);
105 static int ocd_DS_get(void *data, u64 *val) argument
107 *val = ocd_read(DS);
112 static int ocd_count_get(void *data, u64 *val) argument
114 *val = ocd_count;
/arch/blackfin/kernel/
H A Dpwm.c65 unsigned long long val; local
70 val = (unsigned long long)get_sclk() * period_ns;
71 do_div(val, NSEC_PER_SEC);
72 period = val;
74 val = (unsigned long long)period * duty_ns;
75 do_div(val, period_ns);
76 duty = period - val;
/arch/h8300/include/asm/
H A Dsegment.h41 static inline void set_fs(mm_segment_t val) argument
/arch/ia64/kernel/
H A Dperfmon_mckinley.h8 static int pfm_mck_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs);
56 pfm_mck_reserved(unsigned int cnum, unsigned long *val, struct pt_regs *regs) argument
58 unsigned long tmp1, tmp2, ival = *val;
66 *val = tmp1 | tmp2;
68 DPRINT(("pmc[%d]=0x%lx, mask=0x%lx, reset=0x%lx, val=0x%lx\n",
69 cnum, ival, PMC_RSVD_MASK(cnum), PMC_DFL_VAL(cnum), *val));
77 pfm_mck_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs) argument
84 pfm_mck_reserved(cnum, val, regs);
101 DPRINT(("cnum=%u val=0x%lx, using_dbreg=%d loaded=%d\n", cnum, *val, ct
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/arch/ia64/sn/kernel/sn2/
H A Dio.c46 void __sn_outb(unsigned char val, unsigned long port) argument
48 ___sn_outb(val, port);
51 void __sn_outw(unsigned short val, unsigned long port) argument
53 ___sn_outw(val, port);
56 void __sn_outl(unsigned int val, unsigned long port) argument
58 ___sn_outl(val, port);
/arch/m68k/include/asm/
H A Dsegment.h40 static inline void set_fs(mm_segment_t val) argument
44 : /* no outputs */ : "r" (val.seg) : "memory");
/arch/microblaze/include/asm/
H A Dsyscall.h35 int error, long val)
40 regs->r3 = val;
61 unsigned long val)
65 regs->r10 = val;
67 regs->r9 = val;
69 regs->r8 = val;
71 regs->r7 = val;
73 regs->r6 = val;
75 regs->r5 = val;
33 syscall_set_return_value(struct task_struct *task, struct pt_regs *regs, int error, long val) argument
59 microblaze_set_syscall_arg(struct pt_regs *regs, unsigned int n, unsigned long val) argument
/arch/microblaze/kernel/
H A Dptrace.c81 unsigned long val = 0; local
95 val = child->mm->start_code;
97 val = child->mm->start_data;
99 val = child->mm->end_code
107 val = *reg_addr;
127 rval = put_user(val, (unsigned long __user *)data);
/arch/microblaze/pci/
H A Dindirect_pci.c24 int len, u32 *val)
64 *val = in_8(cfg_data);
67 *val = in_le16(cfg_data);
70 *val = in_le32(cfg_data);
78 int len, u32 val)
115 val &= 0xffffff00;
120 val = 0;
130 out_8(cfg_data, val);
133 out_le16(cfg_data, val);
136 out_le32(cfg_data, val);
23 indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) argument
77 indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) argument
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H A Dxilinx_pci.c88 u32 val, dev, func, offset; local
99 PCI_DEVFN(dev, func), offset, &val);
100 if (offset == 0 && val == 0xFFFFFFFF) {
107 printk(KERN_CONT "%08x ", val);
/arch/mips/bcm47xx/
H A Dnvram.c89 int nvram_getenv(char *name, char *val, size_t val_len) argument
110 return snprintf(val, val_len, "%s", value);

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