/arch/mips/include/asm/ |
H A D | cmpxchg.h | 14 static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) argument 33 : "R" (*m), "Jr" (val) 48 : "R" (*m), "Jr" (val) 56 *m = val; 66 static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) argument 83 : "R" (*m), "Jr" (val) 96 : "R" (*m), "Jr" (val) 104 *m = val; 113 extern __u64 __xchg_u64_unsupported_on_32bit_kernels(volatile __u64 * m, __u64 val);
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/arch/mips/kernel/ |
H A D | cevt-ds1287.c | 65 u8 val; local 69 val = CMOS_READ(RTC_REG_B); 73 val |= RTC_PIE; 76 val &= ~RTC_PIE; 80 CMOS_WRITE(val, RTC_REG_B);
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/arch/mips/loongson/common/ |
H A D | gpio.c | 29 u32 val; local 37 val = LOONGSON_GPIODATA; 40 return ((val & mask) != 0); 46 u32 val; local 57 val = LOONGSON_GPIODATA; 59 val |= mask; 61 val &= (~mask); 62 LOONGSON_GPIODATA = val;
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/arch/mips/loongson/lemote-2f/ |
H A D | reset.c | 57 u32 hi, lo, val; local 65 val = inl(gpio_base + GPIOL_OUT_EN); 66 val &= ~(1 << (16 + 13)); 67 val |= (1 << 13); 68 outl(val, gpio_base + GPIOL_OUT_EN); 71 val = inl(gpio_base + GPIOL_OUT_VAL) & ~(1 << (13)); 72 val |= (1 << (16 + 13)); 73 outl(val, gpio_base + GPIOL_OUT_VAL); 99 u8 val; local 105 val [all...] |
/arch/mips/pci/ |
H A D | ops-emma2rh.c | 85 int size, uint32_t * val) 92 *val = 0xffffffffU; 108 *val = (data >> ((where & 3) << 3)) & 0xffU; 111 *val = (data >> ((where & 2) << 3)) & 0xffffU; 114 *val = data; 130 int size, u32 val) 155 data |= ((val & 0xffU) << shift); 160 data |= ((val & 0xffffU) << shift); 163 data = val; 84 pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, uint32_t * val) argument 129 pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
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H A D | ops-lantiq.c | 75 int where, int size, u32 *val) 83 *val = (data >> ((where & 3) << 3)) & 0xff; 85 *val = (data >> ((where & 3) << 3)) & 0xffff; 87 *val = data; 93 int where, int size, u32 val) 98 data = val; 106 (val << ((where & 3) << 3)); 109 (val << ((where & 3) << 3)); 74 ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 92 ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
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/arch/mn10300/kernel/ |
H A D | module.c | 35 static void reloc_put16(uint8_t *p, uint32_t val) argument 37 p[0] = val & 0xff; 38 p[1] = (val >> 8) & 0xff; 41 static void reloc_put24(uint8_t *p, uint32_t val) argument 43 reloc_put16(p, val); 44 p[2] = (val >> 16) & 0xff; 47 static void reloc_put32(uint8_t *p, uint32_t val) argument 49 reloc_put16(p, val); 50 reloc_put16(p+2, val >> 16);
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/arch/mn10300/unit-asb2305/ |
H A D | leds.c | 36 void peripheral_leds7x4_display_dec(unsigned int val, unsigned int points) argument 40 leds = asb2305_led_hex_tbl[(val/1000) % 10]; 42 leds |= asb2305_led_hex_tbl[(val/100) % 10]; 44 leds |= asb2305_led_hex_tbl[(val/10) % 10]; 46 leds |= asb2305_led_hex_tbl[val % 10]; 52 void peripheral_leds7x4_display_hex(unsigned int val, unsigned int points) argument 56 leds = asb2305_led_hex_tbl[(val/1000) % 10]; 58 leds |= asb2305_led_hex_tbl[(val/100) % 10]; 60 leds |= asb2305_led_hex_tbl[(val/10) % 10]; 62 leds |= asb2305_led_hex_tbl[val [all...] |
/arch/parisc/include/asm/ |
H A D | futex.h | 38 u32 val; local 65 val = oldval + oparg; 66 ret = put_user(val, uaddr); 73 val = oldval | oparg; 74 ret = put_user(val, uaddr); 81 val = oldval & ~oparg; 82 ret = put_user(val, uaddr); 89 val = oldval ^ oparg; 90 ret = put_user(val, uaddr); 121 u32 val; local [all...] |
/arch/parisc/lib/ |
H A D | io.c | 105 void memset_io(volatile void __iomem *addr, unsigned char val, int count) argument 107 u32 val32 = (val << 24) | (val << 16) | (val << 8) | val; 109 writeb(val, addr++); 118 writeb(val, addr++);
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/arch/powerpc/boot/ |
H A D | io.h | 20 static inline void out_8(volatile unsigned char *addr, int val) argument 23 : "=m" (*addr) : "r" (val)); 45 static inline void out_le16(volatile u16 *addr, int val) argument 48 : "r" (val), "r" (addr)); 51 static inline void out_be16(volatile u16 *addr, int val) argument 54 : "=m" (*addr) : "r" (val)); 75 static inline void out_le32(volatile unsigned *addr, int val) argument 78 : "r" (val), "r" (addr)); 81 static inline void out_be32(volatile unsigned *addr, int val) argument 84 : "=m" (*addr) : "r" (val)); [all...] |
/arch/powerpc/include/asm/ |
H A D | kvm_booke.h | 26 static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val) argument 28 vcpu->arch.gpr[num] = val; 36 static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val) argument 38 vcpu->arch.cr = val; 46 static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val) argument 48 vcpu->arch.xer = val; 61 static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val) argument 63 vcpu->arch.ctr = val; 71 static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val) argument 73 vcpu->arch.lr = val; 81 kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val) argument [all...] |
/arch/powerpc/kvm/ |
H A D | e500_emulate.c | 150 unsigned long val; local 166 val = (u32)vcpu->arch.shared->mas7_3; 167 kvmppc_set_gpr(vcpu, rt, val); 174 val = vcpu->arch.shared->mas7_3 >> 32; 175 kvmppc_set_gpr(vcpu, rt, val);
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/arch/powerpc/sysdev/ |
H A D | indirect_pci.c | 25 int len, u32 *val) 69 *val = in_8(cfg_data); 72 *val = in_le16(cfg_data); 75 *val = in_le32(cfg_data); 83 int len, u32 val) 124 val &= 0xffffff00; 129 val = 0; 139 out_8(cfg_data, val); 142 out_le16(cfg_data, val); 145 out_le32(cfg_data, val); 24 indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) argument 82 indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) argument [all...] |
H A D | mmio_nvram.c | 59 unsigned char val; local 66 val = ioread8(mmio_nvram_start + addr); 70 return val; 92 void mmio_nvram_write_val(int addr, unsigned char val) argument 99 iowrite8(val, mmio_nvram_start + addr);
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/arch/um/kernel/ |
H A D | exitcode.c | 23 int val; local 29 val = uml_exitcode; 30 seq_printf(m, "%d\n", val);
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/arch/x86/kernel/cpu/ |
H A D | perf_event_p6.c | 46 u64 val; local 49 rdmsrl(MSR_P6_EVNTSEL0, val); 50 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; 51 wrmsrl(MSR_P6_EVNTSEL0, val); 56 unsigned long val; local 59 rdmsrl(MSR_P6_EVNTSEL0, val); 60 val |= ARCH_PERFMON_EVENTSEL_ENABLE; 61 wrmsrl(MSR_P6_EVNTSEL0, val); 69 u64 val = P6_NOP_EVENT; local 72 val | 81 u64 val; local [all...] |
/arch/x86/pci/ |
H A D | early.c | 35 u32 val) 38 outl(val, 0xcfc); 41 void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val) argument 44 outb(val, 0xcfc + (offset&3)); 47 void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val) argument 50 outw(val, 0xcfc + (offset&2)); 63 u32 val; local 72 val = read_pci_config(bus, slot, func, i); 74 printk(" %02x", val & 0xff); 75 val >> 34 write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val) argument [all...] |
/arch/xtensa/include/asm/ |
H A D | cmpxchg.h | 94 static inline unsigned long xchg_u32(volatile int * m, unsigned long val) argument 103 : "a" (m), "a" (val)
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/arch/alpha/include/asm/ |
H A D | rwsem.h | 180 static inline void rwsem_atomic_add(long val, struct rw_semaphore *sem) argument 183 sem->count += val; 195 :"Ir" (val), "m" (sem->count)); 199 static inline long rwsem_atomic_update(long val, struct rw_semaphore *sem) argument 202 sem->count += val; 216 :"Ir" (val), "m" (sem->count));
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/arch/arm/boot/compressed/ |
H A D | atags_to_fdt.c | 31 const char *property, uint32_t val) 36 return fdt_setprop_cell(fdt, offset, property, val); 30 setprop_cell(void *fdt, const char *node_path, const char *property, uint32_t val) argument
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/arch/arm/kernel/ |
H A D | leds.c | 108 static int leds_idle_notifier(struct notifier_block *nb, unsigned long val, argument 111 switch (val) {
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/arch/arm/mach-davinci/ |
H A D | cp_intc.c | 143 u32 val; local 146 for (val = j = 0; j < 4; j++, k++) { 147 val >>= 8; 149 val |= irq_prio[k] << 24; 152 cp_intc_write(val, CP_INTC_CHAN_MAP(i));
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H A D | cpuidle.c | 78 u32 val; local 80 val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET); 84 val |= DDR2_SRPD_BIT; 86 val &= ~DDR2_SRPD_BIT; 87 val |= DDR2_LPMODEN_BIT; 89 val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT); 92 __raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
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/arch/arm/mach-imx/ |
H A D | gpc.c | 74 u32 val; local 81 val = readl_relaxed(reg); 82 val &= ~(1 << d->irq % 32); 83 writel_relaxed(val, reg); 89 u32 val; local 96 val = readl_relaxed(reg); 97 val |= 1 << (d->irq % 32); 98 writel_relaxed(val, reg);
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