Searched refs:mapping (Results 251 - 275 of 298) sorted by relevance

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/arch/arm/mach-davinci/
H A Ddevices-da8xx.c15 #include <linux/dma-mapping.h>
H A Ddm355.c15 #include <linux/dma-mapping.h>
H A Ddm646x.c11 #include <linux/dma-mapping.h>
/arch/arm/mach-ep93xx/
H A Dcore.c23 #include <linux/dma-mapping.h>
/arch/arm/mach-imx/
H A Dmach-mx31_3ds.c16 #include <linux/dma-mapping.h>
/arch/arm/mach-ixp4xx/
H A Dixp4xx_npe.c18 #include <linux/dma-mapping.h>
/arch/arm/mach-pxa/
H A Ddevices.c5 #include <linux/dma-mapping.h>
/arch/arm/mach-versatile/
H A Dcore.c23 #include <linux/dma-mapping.h>
/arch/arm/mm/
H A Ddma-mapping.c2 * linux/arch/arm/mm/dma-mapping.c
10 * DMA uncached mapping support.
19 #include <linux/dma-mapping.h>
242 * Allocate a virtual address in the consistent mapping region.
442 * free a page as defined by the above mapping.
465 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
/arch/arm/plat-orion/
H A Dcommon.c14 #include <linux/dma-mapping.h>
/arch/frv/kernel/
H A Dbreak.S237 # access the fixup table - there's a 1:1 mapping between the slots in the trap tables and
/arch/frv/mm/
H A Dtlb-miss.S149 # see if the cached page table mapping is appropriate
279 # see if the cached page table mapping is appropriate
406 # see if the cached page table mapping is appropriate
524 # see if the cached page table mapping is appropriate
/arch/mips/alchemy/devboards/
H A Ddb1200.c21 #include <linux/dma-mapping.h>
H A Ddb1300.c7 #include <linux/dma-mapping.h>
/arch/powerpc/kernel/
H A Dibmebus.c43 #include <linux/dma-mapping.h>
/arch/powerpc/platforms/ps3/
H A Dsystem-bus.c24 #include <linux/dma-mapping.h>
515 * to the dma address (mapping) of the first page.
/arch/powerpc/sysdev/
H A Dcpm1.c26 #include <linux/dma-mapping.h>
H A Dfsl_rio.c28 #include <linux/dma-mapping.h>
/arch/sparc/include/asm/
H A Dfloppy_64.h14 #include <linux/dma-mapping.h>
/arch/x86/kernel/
H A Dhead_32.S70 * Worst-case size of the kernel mapping we need to make:
150 * Mappings are created both at virtual address 0 (identity mapping)
158 * entries). The identity mapping is handled by pointing two PGD entries
706 # early boot GDT descriptor (must use 1:1 address mapping)
/arch/sparc/kernel/
H A Dhead_32.S623 * for ABI compliance anyways? Does this low-mapping provide
671 * address zero and put the mapping in the KERNBASE
681 sll %l6, 24, %l6 ! Regmap mapping size
707 stha %g6, [%g4] ASI_SEGMAP ! stort new virt mapping
724 sta %g6, [%g4] ASI_SEGMAP ! store new virt mapping
/arch/alpha/kernel/
H A Dpci_iommu.c13 #include <linux/dma-mapping.h>
290 assume it doesn't support sg mapping, and, since we tried to
326 /* Helper for generic DMA-mapping functions. */
723 /* Some allocation failed while mapping the scatterlist
/arch/arm/kernel/
H A Dhead.S157 * generally means mapping in the kernel code.
203 * Create identity mapping to cater for __enable_mmu.
204 * This identity mapping will be removed by paging_init().
215 str r3, [r4, r5, lsl #PMD_ORDER] @ identity mapping
/arch/arm/mach-at91/
H A Dat91rm9200_devices.c16 #include <linux/dma-mapping.h>
H A Dat91sam9260_devices.c15 #include <linux/dma-mapping.h>

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