/arch/sh/include/cpu-sh5/cpu/ |
H A D | registers.h | 51 #define RET r2 52 #define ARG1 r2
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/arch/sh/kernel/ |
H A D | head_32.S | 125 * r2 = PMB_ADDR data field 150 mov.l .LFIRST_ADDR_ENTRY, r2 203 mov r2, r8 235 mov.l r2, @r3; \ 246 add r6, r2; \ 308 mov.l 4f, r2 310 9: cmp/hs r2, r1 311 bf/s 9b ! while (r1 < r2) 312 mov.l r0,@-r2
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/arch/sh/lib/ |
H A D | memcpy-sh4.S | 30 mov r4,r2 ! 5 MT (0 cycles latency) 35 add #7,r2 ! 79 EX 42 cmp/hi r2,r0 ! 57 MT 59 cmp/hi r2,r0 ! 57 MT 78 add #-6,r2 ! 50 EX 81 8: cmp/hi r2,r0 ! 57 MT 103 mov r4,r2 ! 5 MT (0 cycles latency) 108 add #7,r2 ! 79 EX 115 cmp/hi r2,r0 ! 57 MT 136 cmp/hi r2,r [all...] |
/arch/sparc/include/asm/ |
H A D | sfp-machine_32.h | 78 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ 82 : "=r" ((USItype)(r2)), \ 93 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ 97 : "=r" ((USItype)(r2)), \ 108 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ 117 "addx %r2,%3,%%g1\n\t" \ 130 r3 = _t1; r2 = _t2; \ 133 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ 142 "subx %r2,%3,%%g1\n\t" \ 155 r3 = _t1; r2 [all...] |
/arch/arm/kernel/ |
H A D | entry-common.S | 59 mov r2, why @ 'syscall' 166 ldr r2, [r0] 168 cmp r0, r2 173 ldr r2, [r1] 174 cmp r0, r2 178 ldr r2, [r1] 180 cmp r0, r2 189 mov pc, r2 222 mov r2, fp @ frame pointer 475 mov r2, scn [all...] |
H A D | sleep.S | 30 mov r2, r5 @ virtual SP 48 mov sp, r2 96 THUMB( ldmia r0!, {r1, r2, r3} ) 97 THUMB( mov sp, r2 )
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/arch/cris/include/arch-v32/mach-a3/mach/ |
H A D | startup.inc | 51 move.d 0xFC000000, $r2 ; pins 25..0 are eth_mdio, eth, geth 55 GIO_SET_P 0x00FFFF00, $r2 ;; pins 8..23 are eth 57 GIO_SET_P 0x03000000, $r2 ;; pins 24..25 are eth_mdio 59 GIO_SET_P 0x000000FF, $r2 ;; pins 0..7 are geth 61 move.d $r2, [$r1]
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/arch/ia64/kernel/ |
H A D | pal.S | 33 movl r2=pal_entry_point 35 st8 [r2]=in0 266 add r2=16,in0 269 stf.spill [r2] = f11,32 272 stf.spill [r2] = f13,32 275 stf.spill [r2] = f15,32 287 add r2=16,in0 290 ldf.fill f11 = [r2],32 293 ldf.fill f13 = [r2],32 296 ldf.fill f15 = [r2],3 [all...] |
/arch/s390/kernel/ |
H A D | entry.S | 53 basr %r2,%r0 61 basr %r2,%r0 148 l %r4,__THREAD_info(%r2) # get thread_info of prev 155 st %r15,__THREAD_ksp(%r2) # store kernel stack of prev 202 st %r2,__PT_ORIG_GPR2(%r11) 208 st %r2,__PT_R2(%r11) # store return value 262 lr %r2,%r11 # pass pointer to pt_regs 267 lm %r2,%r7,__PT_R2(%r11) # load svc arguments 279 lr %r2,%r11 # pass pointer to pt_regs 289 lr %r2, [all...] |
H A D | entry64.S | 54 basr %r2,%r0 61 basr %r2,%r0 161 lg %r4,__THREAD_info(%r2) # get thread_info of prev 168 stg %r15,__THREAD_ksp(%r2) # store kernel stack of prev 223 stg %r2,__PT_ORIG_GPR2(%r11) 229 stg %r2,__PT_R2(%r11) # store return value 284 lgr %r2,%r11 # pass pointer to pt_regs 288 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments 300 lgr %r2,%r11 # pass pointer to pt_regs 309 lgr %r2, [all...] |
H A D | relocate_kernel.S | 15 * %r2 = pointer to first kimage_entry_t 59 l %r5,0(%r2) # read another word for indirection page 60 ahi %r2,4 # increment pointer 70 lr %r2,%r5 # move it into the right register, 95 sr %r2,%r2 # clear %r2 96 sigp %r1,%r2,0x12 # set cpuid to zero
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H A D | relocate_kernel64.S | 15 * %r2 = pointer to first kimage_entry_t 61 lg %r5,0(%r2) # read another word for indirection page 62 aghi %r2,8 # increment pointer 72 lgr %r2,%r5 # move it into the right register, 98 sr %r2,%r2 # erase register r2 99 sigp %r1,%r2,0x12 # set cpuid to zero
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/arch/arm/lib/ |
H A D | copy_from_user.S | 77 stmdb sp!, {r0, r2, r3, \reg1, \reg2} 96 ldmfd sp!, {r1, r2} 98 rsb r1, r3, r2
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H A D | copy_to_user.S | 80 stmdb sp!, {r0, r2, r3, \reg1, \reg2} 101 ldmfd sp!, {r1, r2, r3} 103 rsb r0, r0, r2
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/arch/arm/mach-omap2/ |
H A D | sleep24xx.S | 92 ldr r4, [r2] @ read SDRC_POWER 95 str r4, [r2] @ make it so 105 str r4, [r2] @ write to SDRC_POWER
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/arch/arm/mm/ |
H A D | abort-lv4t.S | 6 * Params : r2 = pt_regs 72 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn' 76 str r7, [r2, r9, lsr #14] @ Put register 'Rn' 87 ldreq r6, [r2, r9, lsl #2] @ { load Rm value } 90 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn' 94 str r7, [r2, r9, lsr #14] @ Put register 'Rn' 104 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn' 108 str r7, [r2, r9, lsr #14] @ Put register 'Rn' 116 ldr r6, [r2, r7, lsl #2] @ Get register 'Rm' 200 ldr r7, [r2, #1 [all...] |
H A D | proc-v7-3level.S | 64 * - pte - PTE value to store (64-bit in r2 and r3) 68 tst r2, #L_PTE_PRESENT 71 orreq r2, #L_PTE_RDONLY 72 1: strd r2, r3, [r0]
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/arch/mips/kernel/ |
H A D | cevt-r4k.c | 54 const int r2 = cpu_has_mips_r2; local 64 if (handle_perf_irq(r2)) 72 if (!r2 || (read_c0_cause() & (1 << 30))) {
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/arch/parisc/lib/ |
H A D | checksum.c | 65 unsigned int r1, r2, r3, r4; local 67 r2 = *(unsigned int *)(buff + 4); 71 addc(result, r2);
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H A D | lusercopy.S | 87 bv %r0(%r2) 122 bv %r0(%r2) 159 bv %r0(%r2)
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/arch/powerpc/platforms/powermac/ |
H A D | sleep.S | 66 stw r2,SL_R2(r1) 188 mfspr r2,SPRN_HID0 189 rlwinm r2,r2,0,10,7 /* clear doze, nap */ 190 oris r2,r2,HID0_SLEEP@h 193 mtspr SPRN_HID0,r2 202 mfmsr r2 203 oris r2,r2,MSR_PO [all...] |
/arch/tile/mm/ |
H A D | migrate_64.S | 52 * r2 ASID to use for new context (moved to r_asid) 59 #define r_asid_in r2 123 move r2, r_my_cpumask /* cache_cpumask */ 149 move r2, r_asid
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/arch/unicore32/kernel/ |
H A D | entry.S | 179 @ r2 - lr_<exception>, already fixed up for correct return/restart 206 @ r2 - lr_<exception>, already fixed up for correct return/restart 212 stm (r2 - r4), [r0]+ 268 @ r2 - aborted context pc 281 mov r2, sp 292 ldw r2, [sp+], #S_PSR 293 priv_exit r2 @ return from exception 341 mov r0, r2 @ pass address of aborted instruction 344 mov r2, sp @ regs 355 ldw r2, [s [all...] |
/arch/alpha/include/asm/ |
H A D | ptrace.h | 22 unsigned long r2; member in struct:pt_regs
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/arch/arm/mach-at91/ |
H A D | pm.c | 57 char *reason, *r2 = reset; local 76 r2 = signal; 78 r2 = reason; 102 pr_info("AT91: Starting after %s %s\n", reason, r2);
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