/drivers/net/can/sja1000/ |
H A D | sja1000_isa.c | 105 unsigned long base = (unsigned long)priv->reg_base; local 107 outb(reg, base); 108 return inb(base + 1); 114 unsigned long base = (unsigned long)priv->reg_base; local 116 outb(reg, base); 117 outb(val, base + 1); 124 void __iomem *base = NULL; local 137 base = ioremap_nocache(mem[idx], iosize); 138 if (!base) { 162 priv->reg_base = base; [all...] |
/drivers/net/ethernet/freescale/ |
H A D | ucc_geth_ethtool.c | 317 u32 __iomem *base; local 322 base = (u32 __iomem *)&ugeth->ug_regs->tx64; 324 base = NULL; 327 data[j++] = base ? in_be32(&base[i]) : 0; 330 base = (u32 __iomem *)ugeth->p_tx_fw_statistics_pram; 332 data[j++] = base ? in_be32(&base[i]) : 0; 335 base = (u32 __iomem *)ugeth->p_rx_fw_statistics_pram; 337 data[j++] = base [all...] |
/drivers/isdn/hisax/ |
H A D | elsa.c | 459 if (cs->hw.elsa.base) 460 release_region(cs->hw.elsa.base, bytecnt); 569 cs->hw.elsa.base + 8); 570 release_region(cs->hw.elsa.base, 8); 571 if (!request_region(cs->hw.elsa.base, 16, "elsa isdn modem")) { 575 cs->hw.elsa.base + 8, 576 cs->hw.elsa.base + 16); 583 cs->hw.elsa.base + 8); 584 release_region(cs->hw.elsa.base, 8); 585 if (!request_region(cs->hw.elsa.base, 1 [all...] |
/drivers/dma/ |
H A D | mxs-dma.c | 127 void __iomem *base; member in struct:mxs_dma_engine 141 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); 144 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR); 154 mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(chan_id)); 157 writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(chan_id)); 173 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); 176 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR); 189 mxs_dma->base + HW_APBHX_CTRL0 + MXS_CLR_ADDR); 192 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_CLR_ADDR); 221 stat1 = readl(mxs_dma->base [all...] |
H A D | sirf-dma.c | 77 void __iomem *base; member in struct:sirfsoc_dma 115 writel_relaxed(sdesc->width, sdma->base + SIRFSOC_DMA_WIDTH_0 + 119 sdma->base + cid * 0x10 + SIRFSOC_DMA_CH_CTRL); 120 writel_relaxed(sdesc->xlen, sdma->base + cid * 0x10 + 122 writel_relaxed(sdesc->ylen, sdma->base + cid * 0x10 + 124 writel_relaxed(readl_relaxed(sdma->base + SIRFSOC_DMA_INT_EN) | 125 (1 << cid), sdma->base + SIRFSOC_DMA_INT_EN); 131 writel(sdesc->addr >> 2, sdma->base + cid * 0x10 + SIRFSOC_DMA_CH_ADDR); 135 readl_relaxed(sdma->base + SIRFSOC_DMA_CH_LOOP_CTRL), 136 sdma->base [all...] |
/drivers/mmc/host/ |
H A D | wbsd.c | 120 outb(index, host->base + WBSD_IDXR); 121 outb(value, host->base + WBSD_DATAR); 126 outb(index, host->base + WBSD_IDXR); 127 return inb(host->base + WBSD_DATAR); 160 outb(WBSD_POWER_N, host->base + WBSD_CSR); 170 if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT) 185 outb(ier, host->base + WBSD_EIR); 190 inb(host->base + WBSD_ISR); 372 outb(cmd->opcode, host->base + WBSD_CMDR); 374 outb((cmd->arg >> (i * 8)) & 0xff, host->base 1347 wbsd_request_region(struct wbsd_host *host, int base) argument 1505 wbsd_request_resources(struct wbsd_host *host, int base, int irq, int dma) argument 1593 int base, irq, dma; local 1647 wbsd_init(struct device *dev, int base, int irq, int dma, int pnp) argument [all...] |
H A D | jz4740_mmc.c | 124 void __iomem *base; member in struct:jz4740_mmc_host 153 writew(host->irq_mask, host->base + JZ_REG_MMC_IMASK); 164 writew(val, host->base + JZ_REG_MMC_STRPCL); 172 writew(JZ_MMC_STRPCL_CLOCK_STOP, host->base + JZ_REG_MMC_STRPCL); 174 status = readl(host->base + JZ_REG_MMC_STATUS); 183 writew(JZ_MMC_STRPCL_RESET, host->base + JZ_REG_MMC_STRPCL); 186 status = readl(host->base + JZ_REG_MMC_STATUS); 207 status = readw(host->base + JZ_REG_MMC_IREG); 225 status = readl(host->base + JZ_REG_MMC_STATUS); 241 void __iomem *fifo_addr = host->base [all...] |
H A D | sdhci-of-esdhc.c | 27 int base = reg & ~0x3; local 31 ret = in_be32(host->ioaddr + base) & 0xffff; 33 ret = (in_be32(host->ioaddr + base) >> shift) & 0xffff; 39 int base = reg & ~0x3; local 41 u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff;
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/drivers/acpi/acpica/ |
H A D | exconvrt.c | 54 acpi_ex_convert_to_ascii(u64 integer, u16 base, u8 *string, u8 max_length); 287 acpi_ex_convert_to_ascii(u64 integer, u16 base, u8 *string, u8 data_width) argument 300 switch (base) { 388 * Type - String flags (base and conversion type) 404 u16 base = 16; local 425 base = 10; 451 acpi_ex_convert_to_ascii(obj_desc->integer.value, base, 463 /* Setup string length, base, and separator */ 471 base = 10; 534 base, new_bu [all...] |
/drivers/clocksource/ |
H A D | clksrc-dbx500-prcmu.c | 71 void __init clksrc_dbx500_prcmu_init(void __iomem *base) argument 73 clksrc_dbx500_timer_base = base;
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H A D | mmio.c | 45 * @base: Virtual address of the clock readout register 52 int __init clocksource_mmio_init(void __iomem *base, const char *name, argument 65 cs->reg = base;
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H A D | acpi_pm.c | 236 unsigned long base; local 238 if (strict_strtoul(arg, 16, &base)) 241 if (base > UINT_MAX) 245 pmtmr_ioport, base); 246 pmtmr_ioport = base;
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/drivers/gpu/drm/exynos/ |
H A D | exynos_drm_gem.h | 30 struct exynos_drm_gem_obj, base) 56 * @base: a gem object. 71 struct drm_gem_object base; member in struct:exynos_drm_gem_obj
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/drivers/gpu/drm/nouveau/ |
H A D | nouveau_backlight.c | 101 struct drm_device *dev = nv_encoder->base.base.dev; 115 struct drm_device *dev = nv_encoder->base.base.dev; 135 struct drm_device *dev = nv_encoder->base.base.dev; 152 struct drm_device *dev = nv_encoder->base.base.dev;
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H A D | nv50_display.h | 88 void nv50_evo_dmaobj_init(struct nouveau_gpuobj *, u32 memtype, u64 base, 91 u64 base, u64 size, struct nouveau_gpuobj **);
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/drivers/media/video/blackfin/ |
H A D | ppi.c | 54 struct bfin_ppi_regs *reg = info->base; 66 struct bfin_eppi_regs *reg = info->base; 121 struct bfin_ppi_regs *reg = info->base; 127 struct bfin_eppi_regs *reg = info->base; 148 struct bfin_ppi_regs *reg = info->base; 154 struct bfin_eppi_regs *reg = info->base; 188 struct bfin_ppi_regs *reg = info->base; 200 struct bfin_eppi_regs *reg = info->base;
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/drivers/pci/hotplug/ |
H A D | cpqphp_sysfs.c | 52 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 59 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 66 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 73 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 98 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 105 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 112 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 119 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
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/drivers/staging/omapdrm/ |
H A D | omap_crtc.c | 26 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base) 29 struct drm_crtc base; member in struct:omap_crtc 152 list_add_tail(&event->base.link, 153 &event->base.file_priv->event_list); 154 wake_up_interruptible(&event->base.file_priv->event_wait); 183 DBG("%d -> %d", crtc->fb ? crtc->fb->base.id : -1, fb->base.id); 231 crtc = &omap_crtc->base;
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/drivers/usb/host/whci/ |
H A D | wusb.c | 31 le_writel(bit, whc->base + WUSBDIBUPDATED + offset); 34 whc->base + WUSBDIBUPDATED + offset, bit, 0, 63 now_time = le_readl(whc->base + WUSBTIME) & WUSBTIME_CHANNEL_TIME_MASK; 137 le_writel(dntsctrl, whc->base + WUSBDNTSCTRL); 155 le_writel(tkid, whc->base + WUSBTKID); 157 le_writel(seckey[i], whc->base + WUSBSECKEY + 4*i); 158 le_writel(setkeycmd, whc->base + WUSBSETSECKEYCMD); 160 ret = whci_wait_for(&whc->umc->dev, whc->base + WUSBSETSECKEYCMD,
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/drivers/i2c/busses/ |
H A D | i2c-amd8111.c | 30 int base; member in struct:amd_smbus 76 while ((inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_IBF) && --timeout) 92 while ((~inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_OBF) && --timeout) 112 outb(AMD_EC_CMD_RD, smbus->base + AMD_EC_CMD); 117 outb(address, smbus->base + AMD_EC_DATA); 122 *data = inb(smbus->base + AMD_EC_DATA); 135 outb(AMD_EC_CMD_WR, smbus->base + AMD_EC_CMD); 140 outb(address, smbus->base + AMD_EC_DATA); 145 outb(data, smbus->base + AMD_EC_DATA); 439 smbus->base [all...] |
/drivers/scsi/ |
H A D | stex.c | 247 u32 base[6]; member in struct:st_frame 482 memset(p->base, 0, sizeof(u32)*6); 483 *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0); 771 void __iomem *base = hba->mmio_base; local 781 hba->status_head = readl(base + OMR1); 852 writel(hba->status_head, base + IMR1); 853 readl(base + IMR1); /* flush */ 859 void __iomem *base = hba->mmio_base; local 865 data = readl(base + ODBL); 869 writel(data, base 960 void __iomem *base = hba->mmio_base; local 984 void __iomem *base = hba->mmio_base; local 1068 void __iomem *base = hba->mmio_base; local 1160 void __iomem *base; local 1251 void __iomem *base; local [all...] |
/drivers/gpu/drm/i915/ |
H A D | intel_sdvo.c | 69 struct intel_encoder base; member in struct:intel_sdvo 146 struct intel_connector base; member in struct:intel_sdvo_connector 201 return container_of(encoder, struct intel_sdvo, base.base); 207 struct intel_sdvo, base); 212 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); 232 struct drm_device *dev = intel_sdvo->base.base.dev; 1227 struct drm_device *dev = intel_sdvo->base.base [all...] |
/drivers/mtd/maps/ |
H A D | scx200_docflash.c | 78 unsigned base; local 98 pci_read_config_dword(bridge, SCx200_DOCCS_BASE, &base); 104 if (base == 0 121 docmem.start = base; 122 docmem.end = base + size;
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/drivers/net/ethernet/i825xx/ |
H A D | ether1.h | 25 #define REG_PAGE (priv(dev)->base + 0x0000) 28 #define REG_CONTROL (priv(dev)->base + 0x0004) 34 #define ETHER1_RAM (priv(dev)->base + 0x2000) 37 #define IDPROM_ADDRESS (priv(dev)->base + 0x0024) 40 void __iomem *base; member in struct:ether1_priv 218 unsigned short iscp_basel; /* base of SCB */ 277 * Words after ID block [base + 8 words]
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/drivers/net/ethernet/ibm/emac/ |
H A D | tah.c | 50 struct tah_regs __iomem *p = dev->base; 86 memcpy_fromio(regs, dev->base, sizeof(struct tah_regs)); 113 dev->base = (struct tah_regs __iomem *)ioremap(regs.start, 115 if (dev->base == NULL) { 146 iounmap(dev->base);
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