/drivers/net/wireless/iwlegacy/ |
H A D | 3945-rs.c | 440 * il3945_rs_tx_status - Update rate control values based on Tx results 612 * The rate control algorithm has no internal mapping between hw_mode's 613 * rate ordering and the rate ordering used by the rate control algorithm. 615 * The rate control algorithm uses a single table of rates that goes across 814 info->control.rates[0].idx = idx - IL_FIRST_OFDM_RATE; 817 info->control.rates[0].idx = rs_sta->last_txrate_idx;
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/drivers/scsi/aic7xxx/ |
H A D | aic7xxx_osm.c | 1492 hscb->control = 0; 1502 hscb->control |= ULTRAENB; 1505 hscb->control |= DISCENB; 1509 scb->hscb->control |= MK_MESSAGE; 1518 hscb->control |= tag_msgs[0]; 1523 hscb->control |= MSG_ORDERED_TASK; 1526 hscb->control |= MSG_SIMPLE_TASK; 2266 * Set the MK_MESSAGE control bit indicating 2270 * that our SCB control byte matches the 2275 pending_scb->hscb->control | [all...] |
/drivers/usb/gadget/ |
H A D | Kconfig | 207 zero (for control transfers). 257 control transfers). 279 zero (for control transfers). 291 endpoints, as well as endpoint zero (for control transfers). 396 (for control transfer). 420 (for control transfers) and several endpoints with dedicated 435 endpoints, plus endpoint zero (for control transfers). 470 This driver supports both control transfer and bulk transfer modes. 568 transfers. It also implements control requests, for "chapter 9" 713 endpoint I/O and control request [all...] |
/drivers/video/matrox/ |
H A D | matroxfb_g450.c | 27 size_t control; member in struct:mctl 65 -ENOENT: id not found, create fake disabled control */ 85 return (int*)((char*)minfo + g450_controls[idx].control);
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/drivers/acpi/apei/ |
H A D | cper.c | 281 "%s""bridge: secondary_status: 0x%04x, control: 0x%04x\n", 282 pfx, pcie->bridge.secondary_status, pcie->bridge.control);
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/drivers/atm/ |
H A D | Kconfig | 207 you to control the loopback mode of the chip via a dedicated IOCTL. 301 control memory (128K-1KVC, 512K-4KVC), the size of the packet
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/drivers/media/video/tlg2300/ |
H A D | pd-alsa.c | 16 #include <sound/control.h>
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/drivers/media/video/zoran/ |
H A D | zoran_device.c | 1005 zr->codec->control(zr->codec, CODEC_S_JPEG_APP_DATA, 1010 zr->codec->control(zr->codec, CODEC_S_JPEG_COM_DATA, 1014 zr->codec->control(zr->codec, CODEC_S_JPEG_TDS_BYTE, 1022 zr->vfe->control(zr->vfe, CODEC_S_JPEG_TDS_BYTE,
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H A D | zr36016.c | 349 /* additional control functions */ 359 dprintk(2, "%s: control %d call with %d byte\n", ptr->name, type, 491 .control = zr36016_control,
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/drivers/net/ethernet/nxp/ |
H A D | lpc_eth.c | 387 /* Receive Descriptor control word */ 401 /* Transmit Descriptor control word */ 418 __le32 control; member in struct:txrx_desc_t 610 ptxrxdesc->control = 0; 621 ptxrxdesc->control = RXDESC_CONTROL_INT | (ENET_MAXF_SIZE - 1); 1114 /* Setup control for the transfer */ 1118 ptxrxdesc->control =
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/drivers/net/wimax/i2400m/ |
H A D | debugfs.c | 253 __debugfs_register("dl_", control, dentry);
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/drivers/net/wireless/libertas_tf/ |
H A D | libertas_tf.h | 92 * with a Tx control node. The driver maintains 8 RxPD descriptors for 267 /* Tx control */ 278 /* Pkt Trasnit Power control */ 294 /* Tx control */ 415 __le16 control; member in struct:cmd_ds_802_11_radio_control
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/drivers/scsi/ |
H A D | mvumi.h | 405 /* The format of the page code for firmware control */ 410 u16 control; member in struct:mvumi_hs_page3
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/drivers/staging/ft1000/ft1000-usb/ |
H A D | ft1000_hw.c | 47 // pipe - usb control message pipe 48 // request - control request 49 // requesttype - control message request type 54 // timeout - control message time out value 59 // Description: This function sends a control message via USB interface synchronously 934 hdr.control = 0x00; 937 hdr.portdest ^ hdr.portsrc ^ hdr.sh_str_id ^ hdr.control; 1649 ppseudo_hdr->control = 0; 1708 ppseudo_hdr->control = 0;
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/drivers/staging/line6/ |
H A D | pod.c | 14 #include <sound/control.h> 18 #include "control.h" 176 pod->prog_data.control[param] = value; 419 Transmit PODxt Pro control parameter. 656 if (((pod->prog_data.control[POD_tuner] & 0x40) == 0) 715 if (((pod->prog_data.control[POD_tuner] & 0x40) == 0) 1098 /* control info callback */ 1109 /* control get callback */ 1119 /* control put callback */ 1135 /* control definitio [all...] |
H A D | toneport.c | 14 #include <sound/control.h> 270 /* control definition */ 358 /* register monitor control: */ 365 /* register source select control: */
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/drivers/staging/media/easycap/ |
H A D | easycap.h | 79 #include <sound/control.h>
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/drivers/staging/media/solo6x10/ |
H A D | g723.c | 30 #include <sound/control.h>
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/drivers/usb/host/ |
H A D | ehci-pci.c | 242 temp = ehci_readl(ehci, &ehci->debug->control);
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H A D | ohci-s3c2410.c | 24 #include <plat/usb-control.h> 141 * look at control requests to the hub, and see if we need
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H A D | oxu210hp.h | 75 #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */ 171 u32 control; member in struct:ehci_dbg_port 201 * used with control, bulk, and interrupt transfers. 270 * QH: describes control/bulk/interrupt endpoints
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/drivers/usb/otg/ |
H A D | fsl_otg.h | 51 /* bit 23-16 are interrupt threshold control */ 120 /* bit 15-14 are port indicator control */ 127 /* bit 19-16 are port test control */ 199 /* control Register Bit Masks */ 346 u32 control; /* General Purpose Control Register */ member in struct:usb_dr_mmap
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/drivers/usb/serial/ |
H A D | cypress_m8.c | 694 /* line control commands, which need to be executed immediately, 759 dbg("%s - line control command being issued", __func__); 815 /* do not count the line control and size bytes */ 846 __u8 status, control; local 853 control = priv->line_control; 857 result = ((control & CONTROL_DTR) ? TIOCM_DTR : 0) 858 | ((control & CONTROL_RTS) ? TIOCM_RTS : 0) 1065 | IXON); /* disable enable XON/XOFF flow control */ 1271 /* control and status byte(s) are also counted */
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/drivers/gpu/drm/radeon/ |
H A D | radeon_device.c | 1047 rdev->ddev->control->debugfs_root, 1048 rdev->ddev->control); 1064 rdev->ddev->control);
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/drivers/misc/carma/ |
H A D | carma-fpga-program.c | 186 u32 control, status, size, used, total, curr; local 193 control = ioread32be(priv->regs + FPGA_CONFIG_CONTROL); 201 dev_err(priv->dev, "Control: 0x%.8x\n", control); 456 * control the entire DMA transaction. The system controller FPGA then 513 * transaction, and then put it under external control 528 dev_err(priv->dev, "DMA external control setup failed\n"); 985 /* Get control of DMA channel #0 */ 1018 dev_err(&op->dev, "External DMA control not configured\n");
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