Searched refs:reg_addr (Results 51 - 75 of 82) sorted by relevance

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/drivers/tty/
H A Dsynclink_gt.c291 unsigned char __iomem * reg_addr; /* memory mapped registers address */ member in struct:slgt_info
3491 info->reg_addr = ioremap_nocache(info->phys_reg_addr, SLGT_REG_SIZE);
3492 if (!info->reg_addr) {
3517 if (info->reg_addr) {
3518 iounmap(info->reg_addr);
3519 info->reg_addr = NULL;
3670 port_array[i]->reg_addr = port_array[0]->reg_addr;
3850 unsigned long reg_addr = ((unsigned long)info->reg_addr)
[all...]
/drivers/staging/rts5139/
H A Dms.c2031 u16 i, reg_addr, block_size; local
2106 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
2107 reg_addr++) {
2108 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2111 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
2112 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2208 u16 defect_block, reg_addr; local
[all...]
H A Drts51x_chip.c492 u8 cmd_type, u16 reg_addr, u8 mask, u8 data)
499 ((cmd_type & 0x03) << 6) | (u8) ((reg_addr >> 8) & 0x3F);
500 chip->cmd_buf[i++] = (u8) reg_addr;
491 rts51x_add_cmd(struct rts51x_chip *chip, u8 cmd_type, u16 reg_addr, u8 mask, u8 data) argument
H A Dsd.c107 u16 reg_addr; local
143 for (reg_addr = PPBUF_BASE2;
144 reg_addr < PPBUF_BASE2 + 16; reg_addr++) {
145 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0,
151 for (reg_addr = SD_CMD0; reg_addr <= SD_CMD4;
152 reg_addr++) {
153 rts51x_add_cmd(chip, READ_REG_CMD, reg_addr, 0,
206 reg_addr
[all...]
/drivers/staging/rts_pstor/
H A Dms.c1844 u16 i, reg_addr, block_size; local
1941 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3; reg_addr++) {
1942 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1945 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++) {
1946 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2060 u16 defect_block, reg_addr; local
[all...]
H A Drtsx_chip.c2186 u16 reg_addr; local
2194 reg_addr = PPBUF_BASE2;
2199 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0);
2214 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0);
2231 u16 reg_addr; local
2239 reg_addr = PPBUF_BASE2;
2244 rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, *ptr);
2258 rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, *ptr);
H A Drtsx_transport.c210 u8 cmd_type, u16 reg_addr, u8 mask, u8 data)
216 val |= (u32)(reg_addr & 0x3FFF) << 16;
209 rtsx_add_cmd(struct rtsx_chip *chip, u8 cmd_type, u16 reg_addr, u8 mask, u8 data) argument
/drivers/ide/
H A Dsis5513.c540 u16 reg_addr = hwif->channel ? 0x52: 0x50; local
541 pci_read_config_word(pdev, reg_addr, &regw);
/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_hw.h39 int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data);
40 int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data);
/drivers/net/ethernet/atheros/atl1e/
H A Datl1e_hw.h40 s32 atl1e_read_phy_reg(struct atl1e_hw *hw, u16 reg_addr, u16 *phy_data);
41 s32 atl1e_write_phy_reg(struct atl1e_hw *hw, u32 reg_addr, u16 phy_data);
/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_dump.h135 struct reg_addr { struct
149 static const struct reg_addr reg_addrs[] = {
1142 static const struct reg_addr page_read_regs_e2[] = {
1152 static const struct reg_addr page_read_regs_e3[] = {
H A Dbnx2x_ethtool.c599 const struct reg_addr *reg_info)
656 static inline const struct reg_addr *__bnx2x_get_page_read_ar(struct bnx2x *bp)
680 const struct reg_addr *page_read_addr = __bnx2x_get_page_read_ar(bp);
733 const struct reg_addr *read_addr = __bnx2x_get_page_read_ar(bp);
H A Dbnx2x_main.c3356 u32 reg_addr; local
3438 reg_addr = (HC_REG_COMMAND_REG + port*32 +
3441 reg_addr = (BAR_IGU_INTMEM + IGU_CMD_ATTN_BIT_SET_UPPER*8);
3444 (bp->common.int_block == INT_BLOCK_HC) ? "HC" : "IGU", reg_addr);
3445 REG_WR(bp, reg_addr, asserted);
4300 u32 reg_addr; local
4364 reg_addr = (HC_REG_COMMAND_REG + port*32 +
4367 reg_addr = (BAR_IGU_INTMEM + IGU_CMD_ATTN_BIT_CLR_UPPER*8);
4371 (bp->common.int_block == INT_BLOCK_HC) ? "HC" : "IGU", reg_addr);
4372 REG_WR(bp, reg_addr, va
6630 u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : local
[all...]
/drivers/misc/
H A Dpch_phub.c161 void __iomem *reg_addr = chip->pch_phub_base_address + reg_addr_offset; local
162 iowrite32(((ioread32(reg_addr) & ~mask)) | data, reg_addr);
/drivers/net/ethernet/chelsio/cxgb3/
H A Dael1002.c79 unsigned short reg_addr; member in struct:reg_val
90 err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr,
94 rv->reg_addr, rv->clear_bits,
H A Dt3_hw.c88 t3_write_reg(adapter, p->reg_addr + offset, p->val);
210 u16 reg_addr)
215 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
229 u16 reg_addr, u16 val)
234 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
257 int reg_addr)
263 t3_write_reg(adapter, A_MI1_DATA, reg_addr);
273 u16 reg_addr)
280 ret = mi1_wr_addr(adapter, phy_addr, mmd_addr, reg_addr);
293 u16 reg_addr, u1
209 t3_mi1_read(struct net_device *dev, int phy_addr, int mmd_addr, u16 reg_addr) argument
228 t3_mi1_write(struct net_device *dev, int phy_addr, int mmd_addr, u16 reg_addr, u16 val) argument
256 mi1_wr_addr(struct adapter *adapter, int phy_addr, int mmd_addr, int reg_addr) argument
272 mi1_ext_read(struct net_device *dev, int phy_addr, int mmd_addr, u16 reg_addr) argument
292 mi1_ext_write(struct net_device *dev, int phy_addr, int mmd_addr, u16 reg_addr, u16 val) argument
[all...]
/drivers/net/ethernet/intel/e1000e/
H A Dich8lan.c1024 u16 word_addr, reg_data, reg_addr, phy_page = 0; local
1111 1, &reg_addr);
1116 if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) {
1121 reg_addr &= PHY_REG_MASK;
1122 reg_addr |= phy_page;
1124 ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr,
/drivers/memstick/core/
H A Dmspro_block.c1139 card->reg_addr.r_offset = offsetof(struct mspro_register, status);
1140 card->reg_addr.r_length = sizeof(struct ms_status_register);
1141 card->reg_addr.w_offset = offsetof(struct mspro_register, param);
1142 card->reg_addr.w_length = sizeof(struct mspro_param_register);
/drivers/video/aty/
H A Daty128fb.c2023 unsigned long fb_addr, reg_addr; local
2046 reg_addr = pci_resource_start(pdev, 2);
2047 if (!request_mem_region(reg_addr, pci_resource_len(pdev, 2),
2064 info->fix.mmio_start = reg_addr;
2082 info->fix.mmio_start = reg_addr;
/drivers/media/dvb/frontends/
H A Dstv0900_core.c132 void stv0900_write_reg(struct stv0900_internal *intp, u16 reg_addr, argument
144 data[0] = MSB(reg_addr);
145 data[1] = LSB(reg_addr);
/drivers/net/ethernet/amd/
H A Damd8111e.c1817 unsigned long reg_addr,reg_len; local
1858 reg_addr = pci_resource_start(pdev, 0);
1880 lp->mmio = ioremap(reg_addr, reg_len);
/drivers/media/video/cx23885/
H A Dcx23885.h256 u32 reg_addr; member in struct:cx23885_i2c
/drivers/net/ethernet/atheros/atlx/
H A Datl2.c2541 * reg_addr - address of the PHY register to read
2543 static s32 atl2_read_phy_reg(struct atl2_hw *hw, u16 reg_addr, u16 *phy_data) argument
2548 val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
2575 * reg_addr - address of the PHY register to write
2578 static s32 atl2_write_phy_reg(struct atl2_hw *hw, u32 reg_addr, u16 phy_data) argument
2584 (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
/drivers/staging/sep/
H A Dsep_main.c4176 sep->reg_addr = ioremap_nocache(sep->reg_physical_addr,
4178 if (!sep->reg_addr) {
4188 sep->reg_addr);
4265 iounmap(sep->reg_addr);
4303 iounmap(sep_dev->reg_addr);
/drivers/atm/
H A Dlanai.c471 static inline bus_addr_t reg_addr(const struct lanai_dev *lanai, function
481 t = readl(reg_addr(lanai, reg));
492 writel(val, reg_addr(lanai, reg));

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