Searched refs:ARCH_DMA_MINALIGN (Results 1 - 17 of 17) sorted by relevance

/arch/mips/include/asm/mach-ip32/
H A Dkmalloc.h6 #define ARCH_DMA_MINALIGN 32 macro
8 #define ARCH_DMA_MINALIGN 128 macro
/arch/mips/include/asm/mach-generic/
H A Dkmalloc.h10 #define ARCH_DMA_MINALIGN 128 macro
/arch/mips/include/asm/mach-tx49xx/
H A Dkmalloc.h4 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/m68k/include/asm/
H A Dcache.h11 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/unicore32/include/asm/
H A Dcache.h25 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/arm/include/asm/
H A Dcache.h17 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/xtensa/include/asm/
H A Dcache.h32 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/avr32/include/asm/
H A Dcache.h14 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/blackfin/include/asm/
H A Dcache.h20 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/tile/include/asm/
H A Dcache.h30 * TILE-Gx is fully coherent so we don't need to define ARCH_DMA_MINALIGN.
33 #define ARCH_DMA_MINALIGN L2_CACHE_BYTES macro
/arch/parisc/include/asm/
H A Dcache.h29 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/powerpc/include/asm/
H A Dpage_32.h13 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/frv/include/asm/
H A Dmem-layout.h38 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/c6x/include/asm/
H A Dcache.h41 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/mn10300/include/asm/
H A Dcache.h24 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/microblaze/include/asm/
H A Dpage.h43 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/sh/include/asm/
H A Dpage.h198 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro

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