Searched refs:DCR (Results 1 - 6 of 6) sorted by relevance
/arch/sh/include/cpu-sh5/cpu/ |
H A D | registers.h | 40 #define DCR cr16 macro 99 #define __DCR __str(DCR)
|
/arch/mn10300/include/asm/ |
H A D | frame.inc | 77 movhu (DCR),d1 79 movhu d1,(DCR)
|
H A D | cpu-regs.h | 122 #define DCR __SYSREG(0xc0000030, u16) /* Debug control register */ macro
|
/arch/ia64/kernel/ |
H A D | paravirt.c | 183 CASE_GET_CR(DCR); 263 CASE_SET_CR(DCR); 443 __DEFINE_GET_CR(DCR, dcr) 526 __DEFINE_SET_CR(DCR, dcr) 836 IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(dcr, DCR),
|
/arch/ia64/kvm/ |
H A D | trampoline.S | 269 add r2 = CTX(DCR),r32; \ 272 st8 [r2] = r16,CTX(IVA)-CTX(DCR); \ 287 add r2 = CTX(DCR),r33; \ 289 ld8 r16 = [r2],CTX(IVA)-CTX(DCR); \
|
/arch/sh/kernel/cpu/sh5/ |
H A D | entry.S | 455 putcon SP, DCR 500 getcon DCR, SP 513 putcon SP, DCR 540 getcon DCR, SP 1796 /* On entry, former r15 (SP) is in DCR 1800 DCR is the only register whose value is lost altogether. 1926 getcon DCR, SP
|
Completed in 165 milliseconds