Searched refs:RESET (Results 1 - 6 of 6) sorted by relevance

/arch/mips/cobalt/
H A Dreset.c20 #define RESET 0x0f macro
47 writeb(RESET, RESET_PORT);
/arch/c6x/kernel/
H A Dvectors.S12 ; At RESET the processor sets up the DRAM timing parameters and
47 .global RESET
48 .hidden RESET
49 RESET: label
/arch/blackfin/mach-bf527/include/mach/
H A DdefBF525.h269 #define RESET 0x8 /* Reset indicator */ macro
/arch/blackfin/mach-bf548/include/mach/
H A DdefBF542.h497 #define RESET 0x8 /* Reset indicator */ macro
H A DdefBF547.h804 #define RESET 0x8 /* Reset indicator */ macro
/arch/powerpc/platforms/wsp/
H A Dwsp_pci.c868 DREG(RESET),

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