Searched refs:UART_LCR (Results 1 - 15 of 15) sorted by relevance
/arch/frv/kernel/ |
H A D | gdb-io.h | 24 #undef UART_LCR macro 37 #define UART_LCR 3*8 /* Out: Line Control Register */ macro
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/arch/powerpc/boot/ |
H A D | virtex.c | 21 #define UART_LCR 3 /* Out: Line Control Register */ macro 58 out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB); 65 out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8);
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H A D | ns16550.c | 21 #define UART_LCR 3 /* Out: Line Control Register */ macro
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/arch/powerpc/platforms/embedded6xx/ |
H A D | ls_uart.c | 66 out_8(avr_addr + UART_LCR, cval); /* initialise UART */ 72 out_8(avr_addr + UART_LCR, cval); /* Set character format */ 74 out_8(avr_addr + UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ 77 out_8(avr_addr + UART_LCR, cval); /* reset DLAB */
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/arch/arm/mach-tegra/include/mach/ |
H A D | uncompress.h | 152 uart[UART_LCR << DEBUG_UART_SHIFT] |= UART_LCR_DLAB; 155 uart[UART_LCR << DEBUG_UART_SHIFT] = 3;
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/arch/mips/pmc-sierra/msp71xx/ |
H A D | msp_serial.c | 50 if (offset == UART_LCR) 83 writeb(d->last_lcr, p->membase + (UART_LCR << p->regshift));
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/arch/x86/platform/mrst/ |
H A D | early_printk_mrst.c | 271 lcr = readb(phsu + UART_LCR); 272 writeb((0x80 | lcr), phsu + UART_LCR); 274 writeb(lcr, phsu + UART_LCR); 279 writeb(0x3, phsu + UART_LCR);
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/arch/mn10300/unit-asb2303/include/unit/ |
H A D | serial.h | 72 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8) 87 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)
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/arch/mips/cavium-octeon/ |
H A D | serial.c | 41 if (offset == UART_LCR)
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/arch/mn10300/unit-asb2305/include/unit/ |
H A D | serial.h | 63 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
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/arch/mn10300/unit-asb2364/include/unit/ |
H A D | serial.h | 69 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 2, u8)
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/arch/sh/include/asm/ |
H A D | smc37c93x.h | 61 #define UART_LCR 0x6 /* Line Control Register */ macro
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/arch/blackfin/mach-bf533/include/mach/ |
H A D | cdefBF532.h | 496 #define bfin_read_UART_LCR() bfin_read16(UART_LCR) 497 #define bfin_write_UART_LCR(val) bfin_write16(UART_LCR,val)
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/arch/mips/include/asm/mach-au1x00/ |
H A D | au1000.h | 1167 #define UART_LCR 0x14 /* Line Control Register */ macro
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/arch/blackfin/mach-bf561/include/mach/ |
H A D | cdefBF561.h | 125 #define bfin_read_UART_LCR() bfin_read16(UART_LCR) 126 #define bfin_write_UART_LCR(val) bfin_write16(UART_LCR,val)
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