Searched refs:__raw_writeb (Results 1 - 25 of 110) sorted by relevance

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/arch/arm/mach-shmobile/include/mach/
H A Dmmc-ap4eb.h17 __raw_writeb(0x10, PORT185CR);
18 __raw_writeb(0x10, PORT186CR);
19 __raw_writeb(0x10, PORT187CR);
20 __raw_writeb(0x10, PORT188CR);
H A Dmmc-mackerel.h18 __raw_writeb(0x10, PORT0CR);
19 __raw_writeb(0x10, PORT1CR);
20 __raw_writeb(0x10, PORT2CR);
21 __raw_writeb(0x10, PORT159CR);
/arch/arm/boot/compressed/
H A Dmmcif-sh7372.c53 __raw_writeb(0x04, PORT84CR);
54 __raw_writeb(0x04, PORT85CR);
55 __raw_writeb(0x04, PORT86CR);
56 __raw_writeb(0x04, PORT87CR);
57 __raw_writeb(0x04, PORT88CR);
58 __raw_writeb(0x04, PORT89CR);
59 __raw_writeb(0x04, PORT90CR);
60 __raw_writeb(0x04, PORT91CR);
61 __raw_writeb(0x04, PORT92CR);
67 __raw_writeb(
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H A Dsdhi-sh7372.c59 __raw_writeb(CR_FUNCTION1, PORT184CR);
61 __raw_writeb(CR_INPUT_ENABLE|CR_FUNCTION1, PORT179CR);
63 __raw_writeb(CR_FUNCTION1, PORT183CR);
65 __raw_writeb(CR_FUNCTION1, PORT182CR);
67 __raw_writeb(CR_FUNCTION1, PORT181CR);
69 __raw_writeb(CR_FUNCTION1, PORT180CR);
/arch/sh/include/cpu-sh3/cpu/
H A Ddac.h23 __raw_writeb(v,DACR);
32 __raw_writeb(v,DACR);
37 if(channel) __raw_writeb(value,DADR1);
38 else __raw_writeb(value,DADR0);
/arch/sh/boards/mach-sh03/
H A Drtc.c63 __raw_writeb(0, RTC_SEC1); __raw_writeb(0, RTC_SEC10);
64 __raw_writeb(0, RTC_MIN1); __raw_writeb(0, RTC_MIN10);
65 __raw_writeb(0, RTC_HOU1); __raw_writeb(0, RTC_HOU10);
66 __raw_writeb(6, RTC_WEE1);
67 __raw_writeb(1, RTC_DAY1); __raw_writeb(0, RTC_DAY10);
68 __raw_writeb(
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/arch/m68k/platform/coldfire/
H A Dintc-simr.c72 __raw_writeb(irq - 64, MCFINTC1_SIMR);
74 __raw_writeb(irq, MCFINTC0_SIMR);
82 __raw_writeb(irq - 64, MCFINTC1_CIMR);
84 __raw_writeb(irq, MCFINTC0_CIMR);
91 __raw_writeb(0x1 << ebit, MCFEPORT_EPFR);
104 __raw_writeb(v & ~(0x1 << ebit), MCFEPORT_EPDDR);
108 __raw_writeb(v | (0x1 << ebit), MCFEPORT_EPIER);
113 __raw_writeb(5, MCFINTC1_ICR0 + irq - 64);
115 __raw_writeb(5, MCFINTC0_ICR0 + irq);
175 __raw_writeb(
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H A Dreset.c30 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
40 __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
H A Ddma_timer.c58 __raw_writeb(0x00, DTXMR0);
59 __raw_writeb(0x00, DTER0);
/arch/arm/mach-omap1/
H A Dfpga.c41 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
44 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
47 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
74 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
77 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
80 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
151 __raw_writeb(0, OMAP1510_FPGA_IMR_LO);
152 __raw_writeb(0, OMAP1510_FPGA_IMR_HI);
153 __raw_writeb(0, INNOVATOR_FPGA_IMR2);
/arch/sh/kernel/cpu/
H A Dadc.c23 __raw_writeb(csr, ADCSR);
30 __raw_writeb(csr, ADCSR);
/arch/sh/include/mach-ecovec24/mach/
H A Dromimage.h44 __raw_writeb(1 << (nr - 1), PGDR);
/arch/sh/boards/mach-hp6xx/
H A Dpm.c63 __raw_writeb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
94 __raw_writeb(stbcr, STBCR);
119 __raw_writeb(0x1f, DACR);
122 __raw_writeb(0x01, STBCR);
125 __raw_writeb(0x7f , STBCR2);
132 __raw_writeb(stbcr, STBCR);
133 __raw_writeb(stbcr2, STBCR2);
/arch/arm/mach-ebsa110/
H A Dcore.c37 __raw_writeb(1 << d->irq, IRQ_MCLR);
42 __raw_writeb(1 << d->irq, IRQ_MSET);
57 __raw_writeb(0xff, IRQ_MCLR);
58 __raw_writeb(0x55, IRQ_MSET);
59 __raw_writeb(0x00, IRQ_MSET);
62 __raw_writeb(0xff, IRQ_MCLR); /* clear all interrupt enables */
165 __raw_writeb(0x40, PIT_CTRL);
193 __raw_writeb(0x40, PIT_CTRL);
199 __raw_writeb(count & 0xff, PIT_T1);
200 __raw_writeb(coun
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/arch/arm/mach-ep93xx/include/mach/
H A Duncompress.h24 static void __raw_writeb(unsigned char value, unsigned int ptr) function
58 __raw_writeb(c, PHYS_UART_DATA);
/arch/sh/include/mach-se/mach/
H A Dmrshpc.h48 __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206);
49 __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200);
/arch/m68k/platform/54xx/
H A Dconfig.c33 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD,
35 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS,
37 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS |
39 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD,
/arch/sh/include/cpu-sh2/cpu/
H A Dwatchdog.h65 __raw_writeb((WTCNT_HIGH << 8) | (__u16)val, RSTCSR);
/arch/sparc/include/asm/
H A Dio.h17 #define writeb_be(__b, __addr) __raw_writeb(__b, __addr)
/arch/arm/mach-s3c24xx/
H A Dbast-irq.c84 __raw_writeb(temp, BAST_VA_PC104_IRQMASK);
103 __raw_writeb(temp, BAST_VA_PC104_IRQMASK);
148 __raw_writeb(0x0, BAST_VA_PC104_IRQMASK);
/arch/arm/mach-ux500/include/mach/
H A Duncompress.h40 __raw_writeb(c, ux500_uart_base + UART01x_DR);
/arch/sh/boards/mach-cayman/
H A Dpanic.c31 __raw_writeb(nibble + ((nibble > 9) ? 55 : 48),
/arch/sh/kernel/cpu/sh3/
H A Dserial-sh770x.c27 __raw_writeb(data & 0xbf, SCPDR);
/arch/sh/include/mach-common/mach/
H A Dmagicpanelr2.h22 #define SETBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) | mask, reg)
25 #define CLRBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) & ~mask, reg)
/arch/arm/mach-ixp2000/include/mach/
H A Dio.h39 #define outb(v,p) __raw_writeb((v),alignb(___io(p)))
101 __raw_writeb((v), alignb(p)); \
103 __raw_writeb((v), p); \

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