/arch/x86/boot/ |
H A D | ctype.h | 5 static inline int isdigit(int ch) argument 7 return (ch >= '0') && (ch <= '9'); 10 static inline int isxdigit(int ch) argument 12 if (isdigit(ch)) 15 if ((ch >= 'a') && (ch <= 'f')) 18 return (ch >= 'A') && (ch <= 'F');
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H A D | tty.c | 30 static void __attribute__((section(".inittext"))) serial_putchar(int ch) argument 37 outb(ch, early_serial_base + TXR); 40 static void __attribute__((section(".inittext"))) bios_putchar(int ch) argument 48 ireg.al = ch; 52 void __attribute__((section(".inittext"))) putchar(int ch) argument 54 if (ch == '\n') 57 bios_putchar(ch); 60 serial_putchar(ch);
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/arch/unicore32/include/mach/ |
H A D | ocd.h | 31 #define putc(ch) ocd_putc(ch) 33 #define putc(ch)
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H A D | dma.h | 38 static inline void puv3_stop_dma(int ch) argument 40 writel(readl(DMAC_CONFIG(ch)) & ~DMAC_CONFIG_EN, DMAC_CONFIG(ch)); 43 static inline void puv3_resume_dma(int ch) argument 45 writel(readl(DMAC_CONFIG(ch)) | DMAC_CONFIG_EN, DMAC_CONFIG(ch));
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H A D | regs-dmac.h | 36 * Source Addr DMAC_SRCADDR(ch). 38 #define DMAC_SRCADDR(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x00) 40 * Destination Addr DMAC_DESTADDR(ch). 42 #define DMAC_DESTADDR(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x04) 44 * Control Reg DMAC_CONTROL(ch). 46 #define DMAC_CONTROL(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x0C) 48 * Configuration Reg DMAC_CONFIG(ch) [all...] |
/arch/powerpc/boot/ |
H A D | ugecon.h | 20 extern void ug_putc(char ch);
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/arch/um/drivers/ |
H A D | ssl.h | 10 extern void ssl_receive_char(int line, char ch);
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/arch/arm/mach-msm/include/mach/ |
H A D | dma.h | 49 #define DMOV_SD0(off, ch) (MSM_DMOV_BASE + 0x0000 + (off) + ((ch) << 2)) 50 #define DMOV_SD1(off, ch) (MSM_DMOV_BASE + 0x0400 + (off) + ((ch) << 2)) 51 #define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2)) 52 #define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2)) 60 #define DMOV_CMD_PTR(ch) DMOV_SD_AARM(0x000, ch) [all...] |
H A D | msm_smd.h | 25 int smd_open(const char *name, smd_channel_t **ch, void *priv, 32 int smd_close(smd_channel_t *ch); 35 int smd_read(smd_channel_t *ch, void *data, int len); 42 int smd_write(smd_channel_t *ch, const void *data, int len); 43 int smd_write_atomic(smd_channel_t *ch, const void *data, int len); 45 int smd_write_avail(smd_channel_t *ch); 46 int smd_read_avail(smd_channel_t *ch); 51 int smd_cur_packet_size(smd_channel_t *ch); 57 void smd_kick(smd_channel_t *ch); 64 int smd_wait_until_readable(smd_channel_t *ch, in [all...] |
/arch/mips/include/asm/mach-rc32434/ |
H A D | dma_v.h | 25 static inline int rc32434_halt_dma(struct dma_reg *ch) argument 28 if (__raw_readl(&ch->dmac) & DMA_CHAN_RUN_BIT) { 29 __raw_writel(0, &ch->dmac); 31 if (__raw_readl(&ch->dmas) & DMA_STAT_HALT) { 32 __raw_writel(0, &ch->dmas); 41 static inline void rc32434_start_dma(struct dma_reg *ch, u32 dma_addr) argument 43 __raw_writel(0, &ch->dmandptr); 44 __raw_writel(dma_addr, &ch->dmadptr); 47 static inline void rc32434_chain_dma(struct dma_reg *ch, u32 dma_addr) argument 49 __raw_writel(dma_addr, &ch [all...] |
/arch/arm/mach-msm/ |
H A D | smd.c | 150 static int smd_stream_read_avail(struct smd_channel *ch) argument 152 return (ch->recv->head - ch->recv->tail) & ch->fifo_mask; 156 static int smd_stream_write_avail(struct smd_channel *ch) argument 158 return ch->fifo_mask - 159 ((ch->send->head - ch->send->tail) & ch->fifo_mask); 162 static int smd_packet_read_avail(struct smd_channel *ch) argument 174 smd_packet_write_avail(struct smd_channel *ch) argument 180 ch_is_open(struct smd_channel *ch) argument 187 ch_read_buffer(struct smd_channel *ch, void **ptr) argument 200 ch_read_done(struct smd_channel *ch, unsigned count) argument 211 ch_read(struct smd_channel *ch, void *_data, int len) argument 236 update_stream_state(struct smd_channel *ch) argument 241 update_packet_state(struct smd_channel *ch) argument 261 ch_write_buffer(struct smd_channel *ch, void **ptr) argument 280 ch_write_done(struct smd_channel *ch, unsigned count) argument 287 ch_set_state(struct smd_channel *ch, unsigned n) argument 312 smd_state_change(struct smd_channel *ch, unsigned last, unsigned next) argument 338 struct smd_channel *ch; local 399 smd_need_int(struct smd_channel *ch) argument 413 struct smd_channel *ch; local 440 smd_kick(smd_channel_t *ch) argument 475 smd_stream_write(smd_channel_t *ch, const void *_data, int len) argument 503 smd_packet_write(smd_channel_t *ch, const void *_data, int len) argument 522 smd_stream_read(smd_channel_t *ch, void *data, int len) argument 536 smd_packet_read(smd_channel_t *ch, void *data, int len) argument 561 struct smd_channel *ch; local 659 struct smd_channel *ch; local 677 struct smd_channel *ch; local 726 smd_close(smd_channel_t *ch) argument 746 smd_read(smd_channel_t *ch, void *data, int len) argument 751 smd_write(smd_channel_t *ch, const void *data, int len) argument 756 smd_write_atomic(smd_channel_t *ch, const void *data, int len) argument 766 smd_read_avail(smd_channel_t *ch) argument 771 smd_write_avail(smd_channel_t *ch) argument 776 smd_wait_until_readable(smd_channel_t *ch, int bytes) argument 781 smd_wait_until_writable(smd_channel_t *ch, int bytes) argument 786 smd_cur_packet_size(smd_channel_t *ch) argument [all...] |
/arch/arm/mach-tegra/ |
H A D | dma.c | 141 static void tegra_dma_update_hw(struct tegra_dma_channel *ch, 143 static void tegra_dma_update_hw_partial(struct tegra_dma_channel *ch, 145 static void tegra_dma_stop(struct tegra_dma_channel *ch); 147 void tegra_dma_flush(struct tegra_dma_channel *ch) argument 152 void tegra_dma_dequeue(struct tegra_dma_channel *ch) argument 156 if (tegra_dma_is_empty(ch)) 159 req = list_entry(ch->list.next, typeof(*req), node); 161 tegra_dma_dequeue_req(ch, req); 165 static void tegra_dma_stop(struct tegra_dma_channel *ch) argument 170 csr = readl(ch 182 tegra_dma_cancel(struct tegra_dma_channel *ch) argument 196 get_channel_status(struct tegra_dma_channel *ch, struct tegra_dma_req *req, bool is_stop_dma) argument 231 dma_active_count(struct tegra_dma_channel *ch, struct tegra_dma_req *req, unsigned int status) argument 258 tegra_dma_dequeue_req(struct tegra_dma_channel *ch, struct tegra_dma_req *_req) argument 309 tegra_dma_is_empty(struct tegra_dma_channel *ch) argument 324 tegra_dma_is_req_inflight(struct tegra_dma_channel *ch, struct tegra_dma_req *_req) argument 342 tegra_dma_enqueue_req(struct tegra_dma_channel *ch, struct tegra_dma_req *req) argument 384 struct tegra_dma_channel *ch = NULL; local 410 tegra_dma_free_channel(struct tegra_dma_channel *ch) argument 421 tegra_dma_update_hw_partial(struct tegra_dma_channel *ch, struct tegra_dma_req *req) argument 441 tegra_dma_update_hw(struct tegra_dma_channel *ch, struct tegra_dma_req *req) argument 548 handle_oneshot_dma(struct tegra_dma_channel *ch) argument 589 handle_continuous_dma(struct tegra_dma_channel *ch) argument 681 struct tegra_dma_channel *ch = data; local 696 struct tegra_dma_channel *ch = data; local 736 struct tegra_dma_channel *ch = &dma_channels[i]; local 768 struct tegra_dma_channel *ch = &dma_channels[i]; local [all...] |
/arch/mips/include/asm/mach-lantiq/xway/ |
H A D | xway_dma.h | 50 extern void ltq_dma_enable_irq(struct ltq_dma_channel *ch); 51 extern void ltq_dma_disable_irq(struct ltq_dma_channel *ch); 52 extern void ltq_dma_ack_irq(struct ltq_dma_channel *ch); 53 extern void ltq_dma_open(struct ltq_dma_channel *ch); 54 extern void ltq_dma_close(struct ltq_dma_channel *ch); 55 extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch); 56 extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch); 57 extern void ltq_dma_free(struct ltq_dma_channel *ch);
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/arch/mn10300/kernel/ |
H A D | mn10300-debug.c | 22 char ch; local 25 ch = *p++; 29 SC0TXB = ch; 31 if (ch == 0x0a) { 38 SC1TXB = ch; 40 if (ch == 0x0a) { 47 SC2TXB = ch; 49 if (ch == 0x0a) {
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/arch/arm/plat-samsung/include/plat/ |
H A D | dma-ops.h | 39 unsigned (*request)(enum dma_ch ch, struct samsung_dma_info *info); 40 int (*release)(unsigned ch, struct s3c2410_dma_client *client); 41 int (*prepare)(unsigned ch, struct samsung_dma_prep_info *info); 42 int (*trigger)(unsigned ch); 43 int (*started)(unsigned ch); 44 int (*flush)(unsigned ch); 45 int (*stop)(unsigned ch);
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/arch/powerpc/platforms/cell/ |
H A D | beat_udbg.c | 51 char ch, *buf = (char *)inbuf; local 67 ch = buf[0]; 71 return ch; 76 int ch; local 78 ch = udbg_getc_poll_beat(); 79 if (ch == -1) { 85 return ch;
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/arch/arm/plat-samsung/ |
H A D | s3c-dma-ops.c | 24 unsigned ch; member in struct:cb_data 49 data->ch = dma_ch; 62 static int s3c_dma_release(unsigned ch, struct s3c2410_dma_client *client) argument 67 if (data->ch == ch) 71 s3c2410_dma_free(ch, client); 77 static int s3c_dma_prepare(unsigned ch, struct samsung_dma_prep_info *info) argument 83 if (data->ch == ch) 87 s3c2410_dma_set_buffdone_fn(ch, s3c_dma_c 97 s3c_dma_trigger(unsigned ch) argument 102 s3c_dma_started(unsigned ch) argument 107 s3c_dma_flush(unsigned ch) argument 112 s3c_dma_stop(unsigned ch) argument [all...] |
/arch/m68k/sun3/prom/ |
H A D | printf.c | 26 char ch, *bptr; local 46 while((ch = *(bptr++)) != 0) { 47 if(ch == '\n') 50 prom_putchar(ch);
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/arch/arm/boot/compressed/ |
H A D | misc.c | 34 static void icedcc_putc(int ch) argument 45 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); 51 static void icedcc_putc(int ch) argument 62 asm("mcr p14, 0, %0, c8, c0, 0" : : "r" (ch)); 67 static void icedcc_putc(int ch) argument 78 asm("mcr p14, 0, %0, c1, c0, 0" : : "r" (ch)); 83 #define putc(ch) icedcc_putc(ch)
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/arch/arm/mach-w90x900/include/mach/ |
H A D | uncompress.h | 32 static void putc(int ch) argument 39 *uart_base = ch;
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/arch/mips/lantiq/xway/ |
H A D | dma.c | 68 ltq_dma_enable_irq(struct ltq_dma_channel *ch) argument 73 ltq_dma_w32(ch->nr, LTQ_DMA_CS); 74 ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN); 80 ltq_dma_disable_irq(struct ltq_dma_channel *ch) argument 85 ltq_dma_w32(ch->nr, LTQ_DMA_CS); 86 ltq_dma_w32_mask(1 << ch->nr, 0, LTQ_DMA_IRNEN); 92 ltq_dma_ack_irq(struct ltq_dma_channel *ch) argument 97 ltq_dma_w32(ch->nr, LTQ_DMA_CS); 104 ltq_dma_open(struct ltq_dma_channel *ch) argument 109 ltq_dma_w32(ch 117 ltq_dma_close(struct ltq_dma_channel *ch) argument 130 ltq_dma_alloc(struct ltq_dma_channel *ch) argument 153 ltq_dma_alloc_tx(struct ltq_dma_channel *ch) argument 168 ltq_dma_alloc_rx(struct ltq_dma_channel *ch) argument 183 ltq_dma_free(struct ltq_dma_channel *ch) argument [all...] |
/arch/mips/include/asm/txx9/ |
H A D | tx3927.h | 20 #define TX3927_TMR_REG(ch) (TX3927_REG_BASE + 0xf000 + (ch) * 0x100) 22 #define TX3927_SIO_REG(ch) (TX3927_REG_BASE + 0xf300 + (ch) * 0x100) 46 } ch[4]; member in struct:tx3927_dma_reg 162 #define TX3927_DMA_MCR_EIS(ch) (0x10000000<<(ch)) 163 #define TX3927_DMA_MCR_DIS(ch) (0x01000000<<(ch)) 165 #define TX3927_DMA_MCR_FIFUM(ch) ( [all...] |
/arch/arm/mach-tegra/include/mach/ |
H A D | dma.h | 137 int tegra_dma_enqueue_req(struct tegra_dma_channel *ch, 139 int tegra_dma_dequeue_req(struct tegra_dma_channel *ch, 141 void tegra_dma_dequeue(struct tegra_dma_channel *ch); 142 void tegra_dma_flush(struct tegra_dma_channel *ch); 144 bool tegra_dma_is_req_inflight(struct tegra_dma_channel *ch, 146 bool tegra_dma_is_empty(struct tegra_dma_channel *ch); 149 void tegra_dma_free_channel(struct tegra_dma_channel *ch);
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/arch/frv/kernel/ |
H A D | uaccess.c | 23 char *p, ch; local 46 __get_user_asm(err, ch, src, "ub", "=r"); 49 if (!ch) 51 *p = ch; 76 char ch; local 89 __get_user_asm(err, ch, p, "ub", "=r"); 92 if (!ch)
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/arch/mips/ath79/ |
H A D | early_printk.c | 34 static void prom_putchar_ar71xx(unsigned char ch) argument 39 __raw_writel(ch, base + UART_TX * 4); 43 static void prom_putchar_ar933x(unsigned char ch) argument 49 __raw_writel(AR933X_UART_DATA_TX_CSR | ch, base + AR933X_UART_DATA_REG); 54 static void prom_putchar_dummy(unsigned char ch) argument 88 void prom_putchar(unsigned char ch) argument 93 _prom_putchar(ch);
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