Searched refs:clr (Results 1 - 25 of 106) sorted by relevance

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/arch/arm/mach-s3c24xx/include/mach/
H A Dhardware.h18 extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg);
/arch/arm/kernel/
H A Dirq.c106 unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; local
114 clr |= IRQ_NOREQUEST;
116 clr |= IRQ_NOPROBE;
118 clr |= IRQ_NOAUTOEN;
119 /* Order is clear bits in "clr" then set bits in "set" */
120 irq_modify_status(irq, clr, set & ~clr);
/arch/sparc/lib/
H A Dffs.S12 clr %o0
19 clr %o1 /* 2 */
23 1: clr %o2
29 clr %o3
32 clr %o4
38 clr %o5
H A Dashldi3.S22 clr %o5
H A Dlshrdi3.S13 clr %o4
H A Dstrncmp_64.S31 clr %o0
H A Dcopy_in_user.S80 clr %o0
91 clr %o0
/arch/powerpc/include/asm/
H A Ddcr-native.h123 unsigned clr, unsigned set)
131 val = (mfdcrx(base_data) & ~clr) | set;
135 val = (__mfdcr(base_data) & ~clr) | set;
149 #define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \
151 reg, clr, set)
122 __dcri_clrset(int base_addr, int base_data, int reg, unsigned clr, unsigned set) argument
H A Dpgtable-ppc32.h169 unsigned long clr,
183 : "r" (p), "r" (clr), "r" (set), "m" (*p)
187 *p = __pte((old & ~clr) | set);
198 unsigned long clr,
214 : "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p)
218 *p = __pte((old & ~(unsigned long long)clr) | set);
168 pte_update(pte_t *p, unsigned long clr, unsigned long set) argument
197 pte_update(pte_t *p, unsigned long clr, unsigned long set) argument
/arch/mn10300/kernel/
H A Dgdb-low.S37 clr d0 define
49 clr d0 define
61 clr d0 define
80 clr d0 define
91 clr d0 define
102 clr d0 define
H A Dmn10300-watchdog-low.S56 clr d0 define
57 clr d1 define
/arch/sparc/include/asm/
H A Dasmmacro.h32 #define RESTORE_ALL b ret_trap_entry; clr %l6;
H A Dns87303.h87 unsigned char clr, unsigned char set)
105 value &= ~(reserved[index] | clr);
86 ns87303_modify(unsigned long port, unsigned int index, unsigned char clr, unsigned char set) argument
H A Dvisasm.h38 clr %o5; \
/arch/arm/mach-shmobile/
H A Dsmp-sh73a0.c53 static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) argument
59 tmp &= ~clr;
H A Dsmp-r8a7779.c76 static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) argument
82 tmp &= ~clr;
/arch/m68k/math-emu/
H A Dfp_util.S70 2: clr.l %d0
99 clr.l %d1 | sign defaults to zero
109 clr.l (%a0)
116 clr.l (%a0)+
117 clr.l (%a0)+
118 clr.l (%a0)
142 clr.l (%a0) | low lword = 0
236 clr.b (%a0)
274 clr.l %d0
279 clr
[all...]
/arch/mips/kernel/
H A Dhead.S76 .macro setup_c0_status set clr
94 or t0, ST0_CU0 | ST0_EXL | ST0_ERL | \set | \clr
95 xor t0, ST0_EXL | ST0_ERL | \clr
99 or t0, ST0_CU0|\set|0x1f|\clr
100 xor t0, 0x1f|\clr
/arch/m68k/ifpsp060/
H A Dos.S94 clr.l %d1 | return success
101 clr.l %d1 | return success
127 clr.l %d1 | return success
134 clr.l %d1 | return success
151 clr.l %d0 | clear whole longword
152 clr.l %d1 | assume success
187 clr.l %d1 | assume success
188 clr.l %d0 | clear whole longword
223 clr.l %d1 | assume success
245 clr
[all...]
/arch/m68k/ifpsp060/src/
H A Ditest.S81 clr.l TESTCTR(%a6)
91 clr.l TESTCTR(%a6)
101 clr.l TESTCTR(%a6)
111 clr.l TESTCTR(%a6)
121 clr.l TESTCTR(%a6)
132 clr.l TESTCTR(%a6)
142 clr.l TESTCTR(%a6)
169 clr.l %d1
181 clr.l IREGS+0x8(%a6)
182 clr
[all...]
H A Dilsp.S298 clr.l %d1
313 clr.w %d5
327 clr.l DDNORMAL(%a6) # count of shifts for normalization
328 clr.b DDSECOND(%a6) # clear flag for quotient digits
329 clr.l %d1 # %d1 will hold trial quotient
362 clr.w %d6 # word u3 left
405 clr.l %d2
408 clr.w %d3 # %d3 now ls word of divisor
412 clr.w %d3 # %d3 now ms word of divisor
421 clr
[all...]
/arch/alpha/lib/
H A Dclear_user.S76 clr $0 # .. e1 :
107 clr $0 # .. e1 :
/arch/mn10300/lib/
H A D__ashldi3.S47 clr d0 define
H A D__lshrdi3.S48 clr d1 define
/arch/mips/alchemy/devboards/
H A Dbcsr.c70 void bcsr_mod(enum bcsr_id reg, unsigned short clr, unsigned short set) argument
77 r &= ~clr;

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