Searched refs:entryLo1 (Results 1 - 1 of 1) sorted by relevance

/arch/mips/pci/
H A Dpci-alchemy.c102 unsigned long offset, status, cfg_base, flags, entryLo0, entryLo1, r; local
143 entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7;
144 if ((entryLo0 != ctx->last_elo0) || (entryLo1 != ctx->last_elo1)) {
145 mod_wired_entry(ctx->wired_entry, entryLo0, entryLo1,
148 ctx->last_elo1 = entryLo1;

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