Searched refs:event_id (Results 1 - 8 of 8) sorted by relevance
/arch/powerpc/include/asm/ |
H A D | perf_event_server.h | 31 int (*get_constraint)(u64 event_id, unsigned long *mskp, 33 int (*get_alternatives)(u64 event_id, unsigned int flags, 36 int (*limited_pmc_event)(u64 event_id); 76 * a 32/64-bit mask that express the constraints between this event_id and 83 * in MMCR* needs to be set to a specific value for this event_id. For a 105 * for the event_id's class set. The test_adder has the least significant 108 * If an event_id is not subject to the constraint expressed by a particular
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H A D | perf_event_fsl_emb.h | 41 u64 (*xlate_event)(u64 event_id);
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/arch/arm/plat-s5p/ |
H A D | s5p-time.c | 185 s5p_time_setup(timer_source.event_id, cycles); 186 s5p_time_start(timer_source.event_id, NON_PERIODIC); 194 s5p_time_stop(timer_source.event_id); 198 s5p_time_setup(timer_source.event_id, clock_count_per_tick); 199 s5p_time_start(timer_source.event_id, PERIODIC); 218 s5p_time_setup(timer_source.event_id, clock_count_per_tick); 219 s5p_time_start(timer_source.event_id, PERIODIC); 232 timer_source.event_id = event; 288 irq_number = timer_source.event_id + IRQ_TIMER0; 358 unsigned long event_id local [all...] |
/arch/arm/plat-samsung/include/plat/ |
H A D | s5p-time.h | 26 unsigned int event_id; member in struct:s5p_timer_source
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/arch/powerpc/perf/ |
H A D | e500-pmu.c | 88 static u64 e500_xlate_event(u64 event_id) argument 90 u32 event_low = (u32)event_id; 100 ret |= event_id & 102 } else if (event_id &
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H A D | core-book3s.c | 280 * The feasible set is returned in event_id[]. 283 u64 event_id[], unsigned int cflags[], 299 && !ppmu->limited_pmc_event(event_id[i])) { 300 ppmu->get_alternatives(event_id[i], cflags[i], 302 event_id[i] = cpuhw->alternatives[i][0]; 304 if (ppmu->get_constraint(event_id[i], &cpuhw->amasks[i][0], 327 n_alt[i] = ppmu->get_alternatives(event_id[i], cflags[i], 347 * See if any alternative k for event_id i, 361 * to event_id i-1 and continue enumerating its 368 * Found a feasible alternative for event_id 282 power_check_constraints(struct cpu_hw_events *cpuhw, u64 event_id[], unsigned int cflags[], int n_ev) argument [all...] |
/arch/sparc/kernel/ |
H A D | perf_event.c | 161 static const struct perf_event_map *ultra3_event_map(int event_id) argument 163 return &ultra3_perfmon_event_map[event_id]; 290 static const struct perf_event_map *niagara1_event_map(int event_id) argument 292 return &niagara1_perfmon_event_map[event_id]; 416 static const struct perf_event_map *niagara2_event_map(int event_id) argument 418 return &niagara2_perfmon_event_map[event_id]; 537 static u64 event_encoding(u64 event_id, int idx) argument 540 event_id <<= sparc_pmu->upper_shift; 542 event_id <<= sparc_pmu->lower_shift; 543 return event_id; [all...] |
/arch/mips/kernel/ |
H A D | perf_event_mipsxx.c | 55 unsigned int event_id; member in struct:mips_perf_event 658 * event_id. 663 (pev->event_id & 0xff); 666 (pev->event_id & 0xff); 674 pev = ((*mipspmu.general_event_map)[idx].event_id == 703 if (pev->event_id == UNSUPPORTED_PERF_EVENT_ID) 1412 raw_event.event_id = base_id; 1481 raw_event.event_id = base_id;
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