Searched refs:in_8 (Results 1 - 25 of 56) sorted by relevance

123

/arch/m68k/hp300/
H A Dtime.c42 in_8(CLOCKBASE + CLKSR);
55 msb1 = in_8(CLOCKBASE + 5);
56 lsb = in_8(CLOCKBASE + 7);
57 msb2 = in_8(CLOCKBASE + 5);
60 lsb = in_8(CLOCKBASE + 7);
H A Dconfig.c117 #define rtc_busy() (in_8(RTCBASE + RTC_CMD) & RTC_BUSY)
118 #define rtc_data_available() (in_8(RTCBASE + RTC_CMD) & RTC_DATA_RDY)
119 #define rtc_status() (in_8(RTCBASE + RTC_CMD))
121 #define rtc_read_data() (in_8(RTCBASE + RTC_DATA))
/arch/powerpc/boot/
H A Dns16550.c40 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_THRE) == 0);
46 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0);
47 return in_8(reg_base);
52 return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0);
H A Dmpc52xx-psc.c49 return in_8(psc + MPC52xx_PSC_BUFFER);
H A Dcuboot-52xx.c50 div = in_8(reg + 0x204) & 0x0020 ? 8 : 4;
H A Debony.c53 fpga_reg0 = in_8(fpga);
H A Dio.h11 static inline int in_8(const volatile unsigned char *addr) function
H A Dtreeboot-walnut.c38 fpga_brds1 = in_8(fpga);
/arch/powerpc/platforms/embedded6xx/
H A Dls_uart.c36 char lsr = in_8(avr_addr + UART_LSR);
46 while (in_8(avr_addr + UART_LSR) & UART_LSR_DR)
47 printk("%c", in_8(avr_addr + UART_RX));
104 (void) in_8(avr_addr + UART_LSR);
105 (void) in_8(avr_addr + UART_RX);
106 (void) in_8(avr_addr + UART_IIR);
107 (void) in_8(avr_addr + UART_MSR);
/arch/powerpc/platforms/powermac/
H A Dudbg_scc.c30 while ((in_8(sccc) & SCC_TXRDY) == 0)
41 if ((in_8(sccc) & SCC_RXRDY) != 0)
42 return in_8(sccd);
52 while ((in_8(sccc) & SCC_RXRDY) == 0)
54 return in_8(sccd);
123 x = in_8(sccc);
132 scc_inittab[1] = in_8(sccc);
134 scc_inittab[3] = in_8(sccc);
H A Dnvram.c152 return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]);
168 val = in_8(&nvram_data[(addr & 0x1f) << 4]);
297 stat = in_8(base);
330 stat = in_8(base);
376 stat = in_8(base) ^ in_8(base);
418 stat = in_8(base) ^ in_8(base);
/arch/powerpc/kernel/
H A Dudbg_16550.c55 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
73 if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
74 return in_8(&udbg_comport->rbr);
84 while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
86 return in_8(&udbg_comport->rbr);
131 old_lcr = in_8(&port->lcr);
137 dll = in_8(&port->dll);
138 dlm = in_8(&port->dlm);
142 if (in_8(&port->mcr) & 0x80)
/arch/m68k/include/asm/
H A Draw_io.h32 #define in_8(addr) \ macro
49 #define raw_inb in_8
52 #define __raw_readb in_8
68 *buf++ = in_8(port);
H A Dide.h47 #define readb in_8
H A Dq40_master.h42 #define master_inb(_reg_) in_8((unsigned char *)q40_master_addr+_reg_)
/arch/powerpc/platforms/512x/
H A Dmpc5121_ads_cpld.c68 in_8(pic_mask) | irq_to_pic_bit(cpld_irq));
78 in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq));
93 u8 status = in_8(statusp);
94 u8 mask = in_8(maskp);
/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pm.c41 out_8(&gpiow->wkup_gpioe, in_8(&gpiow->wkup_gpioe) | (1 << pin));
43 out_8(&gpiow->wkup_ddr, in_8(&gpiow->wkup_ddr) & ~(1 << pin));
45 out_8(&gpiow->wkup_inten, in_8(&gpiow->wkup_inten) | (1 << pin));
/arch/powerpc/sysdev/
H A Dsimple_gpio.c49 return in_8(mm_gc->regs) & u8_pin2mask(gpio);
85 u8_gc->data = in_8(mm_gc->regs);
H A Dmv64x60_udbg.c56 c = in_8(mpsc_base + MPSC_0_CHR_10_OFFSET + 2);
/arch/powerpc/platforms/40x/
H A Dep405.c93 in_8(bcsr_regs + BCSR_XIRQ_SELECT);
/arch/powerpc/platforms/82xx/
H A Dep8248e.c72 in_8(&ep8248e_bcsr[8]);
83 in_8(&ep8248e_bcsr[8]);
94 in_8(&ep8248e_bcsr[8]);
99 return in_8(&ep8248e_bcsr[8]) & BCSR8_MDIO_DATA;
H A Dpq2.c32 in_8(&cpm2_immr->im_clkrst.res[0]);
/arch/powerpc/platforms/85xx/
H A Dksi8560.c158 in_8(cpld_base + KSI8560_CPLD_HVR));
160 in_8(cpld_base + KSI8560_CPLD_PVR));
/arch/powerpc/platforms/83xx/
H A Dmpc834x_mds.c65 bcsr5 = in_8(bcsr_regs + 5);
H A Dmpc837x_mds.c60 bcsr12 = in_8(bcsr_regs + 12) & ~BCSR12_USB_SER_MASK;

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