/arch/arm/mach-pxa/include/mach/ |
H A D | dma.h | 18 #define DMAC_REGS_VIRT io_p2v(0x40000000)
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H A D | debug-macro.S | 18 orr \rv, \rp, #io_p2v(0x40000000) @ virtual
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H A D | hardware.h | 40 #define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) macro 43 # define __REG(x) (*((volatile u32 __iomem *)io_p2v(x))) 45 /* With indexed regs we don't want to feed the index through io_p2v() 54 # define __REG(x) io_p2v(x)
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H A D | pxa27x-udc.h | 177 #define PUDCDN(x) (volatile u32 *)(io_p2v(PHYS_UDCDN((x))))
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/arch/unicore32/include/mach/ |
H A D | hardware.h | 21 #define io_p2v(x) (void __iomem *)((x) - PKUNITY_MMIO_BASE) macro 24 #define io_p2v(x) ((x) - PKUNITY_MMIO_BASE) macro
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H A D | PKUnity.h | 34 #define PKUNITY_PCI_BASE io_p2v(0x80000000) /* 0x80000000 - 0xBFFFFFFF 1GB */ 46 #define PKUNITY_AHB_BASE io_p2v(0xC0000000) 71 #define PKUNITY_APB_BASE io_p2v(0xEE000000)
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/arch/arm/mach-sa1100/include/mach/ |
H A D | hardware.h | 34 #define io_p2v( x ) \ macro 59 # define __REG(x) (*((volatile unsigned long *)io_p2v(x))) 68 # define __REG(x) io_p2v(x)
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/arch/arm/mach-lpc32xx/include/mach/ |
H A D | hardware.h | 31 #define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x)) macro
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H A D | platform.h | 130 #define _PMREG(x) io_p2v(LPC32XX_CLK_PM_BASE +\ 584 #define LPC32XX_INTC_MASK(x) io_p2v((x) + 0x00) 585 #define LPC32XX_INTC_RAW_STAT(x) io_p2v((x) + 0x04) 586 #define LPC32XX_INTC_STAT(x) io_p2v((x) + 0x08) 587 #define LPC32XX_INTC_POLAR(x) io_p2v((x) + 0x0C) 588 #define LPC32XX_INTC_ACT_TYPE(x) io_p2v((x) + 0x10) 589 #define LPC32XX_INTC_TYPE(x) io_p2v((x) + 0x14) 594 #define LPC32XX_TIMER_IR(x) io_p2v((x) + 0x00) 595 #define LPC32XX_TIMER_TCR(x) io_p2v((x) + 0x04) 596 #define LPC32XX_TIMER_TC(x) io_p2v(( [all...] |
/arch/arm/mach-netx/include/mach/ |
H A D | hardware.h | 36 #define io_p2v(x) IOMEM((x) - NETX_IO_PHYS + NETX_IO_VIRT) macro
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H A D | debug-macro.S | 18 orr \rv, \rp, #io_p2v(0x00100000) @ virtual
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/arch/arm/mach-nomadik/ |
H A D | cpu-8815.c | 143 vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0); 144 vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0); 160 l2x0_init(io_p2v(NOMADIK_L2CC_BASE), 0x00730249, 0xfe000fff); 167 void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
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H A D | board-nhk8815.c | 244 src_cr = readl(io_p2v(NOMADIK_SRC_BASE)); 247 writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); 249 nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE));
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/arch/arm/mach-ux500/include/mach/ |
H A D | hardware.h | 28 #define io_p2v(n) __io_address(n) macro
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/arch/arm/mach-lpc32xx/ |
H A D | pm.c | 133 #define EMC_CTRL_REG io_p2v(LPC32XX_EMC_BASE + EMC_DYN_MEM_CTRL_OFS)
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H A D | serial.c | 38 .membase = io_p2v(LPC32XX_UART5_BASE), 50 .membase = io_p2v(LPC32XX_UART3_BASE), 62 .membase = io_p2v(LPC32XX_UART4_BASE), 74 .membase = io_p2v(LPC32XX_UART6_BASE),
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H A D | common.c | 243 __raw_writel(13000, io_p2v(LPC32XX_WDTIM_BASE + 0x18)); 244 __raw_writel(0x70, io_p2v(LPC32XX_WDTIM_BASE + 0xC)); 258 iramptr1 = io_p2v(LPC32XX_IRAM_BASE); 259 iramptr2 = io_p2v(LPC32XX_IRAM_BASE + LPC32XX_IRAM_BANK_SIZE);
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H A D | clock.c | 661 .enable_reg = io_p2v(LPC32XX_USB_BASE + 0xFF4), 895 tmp = __raw_readl(io_p2v(LPC32XX_LCD_BASE + CLCD_TIM2)); 919 tmp = __raw_readl(io_p2v(LPC32XX_LCD_BASE + CLCD_TIM2)) | TIM2_BCD; 935 __raw_writel(tmp, io_p2v(LPC32XX_LCD_BASE + CLCD_TIM2));
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/arch/arm/mach-netx/ |
H A D | xc.c | 110 writel(val, (void __iomem *)io_p2v(adr)); 163 memcpy((void *)io_p2v(dst), src, size); 207 x->xpec_base = (void * __iomem)io_p2v(NETX_PA_XPEC(xcno)); 208 x->xmac_base = (void * __iomem)io_p2v(NETX_PA_XMAC(xcno));
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H A D | generic.c | 171 vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0);
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/arch/arm/mach-nomadik/include/mach/ |
H A D | hardware.h | 27 #define io_p2v(x) ((void __iomem *)(x) \ macro
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/arch/arm/mach-pxa/ |
H A D | irq.c | 28 #define IRQ_BASE io_p2v(0x40d00000) 66 return io_p2v(phys_base[i]);
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H A D | pxa300.c | 104 mfp_init_base(io_p2v(MFPR_BASE));
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H A D | pxa320.c | 92 mfp_init_base(io_p2v(MFPR_BASE));
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H A D | pxa930.c | 196 mfp_init_base(io_p2v(MFPR_BASE));
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