/arch/arm/lib/ |
H A D | muldi3.S | 30 mul xh, yl, xh 37 mul yh, xl, yh 38 mul xl, yl, xl 39 mul ip, yl, ip
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H A D | delay.S | 26 mul r0, r2, r0 35 mul r0, r2, r0 @ max = 2^32-1
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H A D | lib1funcs.S | 332 mul r3, r0, r2 345 mul r3, r0, r2
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/arch/mips/ar7/ |
H A D | clock.c | 83 u32 mul; member in struct:tnetd7200_clock 112 int *postdiv, int *mul) 121 *mul = i; 129 int *mul) 136 *mul = target / tmp_gcd; 138 if ((*mul < 1) || (*mul >= 16)) 144 if (base / *prediv * *mul / *postdiv != target) { 145 approximate(base, target, prediv, postdiv, mul); 146 tmp_freq = base / *prediv * *mul / *postdi 111 approximate(int base, int target, int *prediv, int *postdiv, int *mul) argument 128 calculate(int base, int target, int *prediv, int *postdiv, int *mul) argument 182 int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1; local 221 int prediv, postdiv, mul; local 274 tnetd7200_set_clock(int base, struct tnetd7200_clock *clock, int prediv, int postdiv, int postdiv2, int mul, u32 frequency) argument [all...] |
/arch/unicore32/lib/ |
H A D | delay.S | 28 mul r0, r2, r0 34 mul r0, r2, r0 @ max = 2^32-1
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/arch/openrisc/ |
H A D | Makefile | 30 KBUILD_CFLAGS += $(call cc-option,-mhard-mul) 32 KBUILD_CFLAGS += $(call cc-option,-msoft-mul)
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/arch/arm/mach-tegra/ |
H A D | clock.c | 87 if (c->mul != 0 && c->div != 0) { 88 rate *= c->mul; 284 int mul = 1; local 290 if (c->mul != 0 && c->div != 0) { 291 mul *= c->mul; 298 rate *= mul; 502 if (c->mul != 0 && c->div != 0) { 503 if (c->mul > c->div) { 504 int mul local [all...] |
H A D | tegra30_clocks.c | 566 c->mul = 1; 610 c->mul = 2; 667 c->mul = 2; 704 c->mul = 2; 721 c->rate = (rate * c->mul) / c->div; 737 c->mul = 1; 901 c->mul = sel->n; 909 c->mul = 1; 912 c->mul = (val & PLL_BASE_DIVN_MASK) >> PLL_BASE_DIVN_SHIFT; 1064 c->mul [all...] |
H A D | clock.h | 109 u32 mul; member in struct:clk
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H A D | tegra2_clocks.c | 459 c->mul = 1; 509 c->mul = 1; 535 c->mul = 1; 625 c->mul = 1; 628 c->mul = 1; 631 c->mul = (val & PLL_BASE_DIVN_MASK) >> PLL_BASE_DIVN_SHIFT; 676 c->mul = sel->n; 772 c->mul = 2; 775 c->mul = 1; 778 c->mul [all...] |
/arch/sh/lib/ |
H A D | div64.S | 28 mul.l r6, r2
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/arch/m68k/fpsp040/ |
H A D | binstr.S | 16 | bit 63. The fraction is multiplied by 10 using a mul by 2 17 | shift and a mul by 8 shift. The bits shifted out of the 51 | d2: upper 32-bits of fraction for mul by 8 52 | d3: lower 32-bits of fraction for mul by 8 53 | d4: upper 32-bits of fraction for mul by 2 54 | d5: lower 32-bits of fraction for mul by 2 97 asll #1,%d5 |mul d5 by 2 98 roxll #1,%d4 |mul d4 by 2 100 addxw %d6,%d1 |add in extend from mul by 2 102 | A5. Add mul b [all...] |
H A D | decbin.S | 62 | Clean up and return. Check if the final mul or div resulted 125 | 2. Calculate absolute value of exponent in d1 by mul and add. 153 mulul #TEN,%d1 |mul partial product by one digit place 172 | 1. Calculate absolute value of mantissa in fp0 by mul and add. 331 bccs ap_p_en |if 1, mul fp1 by pwrten factor 332 fmulx (%a1,%d3),%fp1 |mul by 10**(d3_bit_no) 337 fmulx %fp1,%fp0 |mul mantissa by 10**(no_bits_shifted) 379 bccs ap_n_en |if 1, mul fp1 by pwrten factor 380 fmulx (%a1,%d3),%fp1 |mul by 10**(d3_bit_no) 463 bccs e_next |if zero, skip the mul 487 mul: label [all...] |
H A D | bindec.S | 254 fmulx LOG2UP1,%fp0 |if neg, mul by LOG2UP1 258 fmulx LOG2,%fp0 |if pos, mul by LOG2 429 bccs e_next |if zero, skip the mul 430 fmulx (%a1,%d3),%fp1 |mul by 10**(d3_bit_no) 452 | digits. The excess digits are collected in INEX2. If mul, 459 | create a busy stack frame with the mul command and the 486 bne sc_mul |if neg (LAMBDA = 1), scale by mul 492 beqs A9_norm |if norm, continue with mul 504 movew #0x0023,0x40(%a7) |load cmdreg1b with mul command 650 bccs l_next |if zero, skip the mul [all...] |
/arch/arm/boot/compressed/ |
H A D | ll_char_wr.S | 69 mul r7, r2, r7 74 mul r7, r2, r7 88 mul r4, r2, ip 91 mul ip, r2, ip @ avoid r4 98 mul r4, r2, ip 101 mul ip, r2, ip @ avoid r4
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/arch/avr32/mach-at32ap/ |
H A D | hsmc.c | 38 unsigned long mul; local 57 mul = (clk_get_rate(hsmc->mck) / 10000) << 16; 58 mul /= 100000; 60 #define ns2cyc(x) ((((x) * mul) + 65535) >> 16)
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H A D | at32ap700x.c | 117 unsigned long div, mul, rate; local 120 mul = PM_BFEXT(PLLMUL, control) + 1; 124 rate *= mul; 132 unsigned long mul; local 161 mul = (rate + pll_in / 2) / pll_in; 163 if (mul == 0) 166 actual = pll_in * mul; 170 mul_best_fit = mul;
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/arch/arm/mach-at91/ |
H A D | clock.c | 544 unsigned mul, div; local 547 mul = (reg >> 16) & 0x7ff; 548 if (div && mul) { 550 freq *= mul + 1; 567 unsigned i, div = 0, mul = 0, diff = 1 << 30; local 592 if (cpu_is_at91sam9g20() && mul > 63) 605 mul = mul1; 612 return ret | ((mul - 1) << 16) | div;
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/arch/sparc/lib/ |
H A D | Makefile | 7 lib-$(CONFIG_SPARC32) += mul.o rem.o sdiv.o udiv.o umul.o urem.o ashrdi3.o
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H A D | mul.S | 2 * mul.S: This routine was taken from glibc-1.09 and is covered 18 .globl .mul 20 .mul:
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/arch/mips/netlogic/common/ |
H A D | smpboot.S | 108 mul t3, t2, t1 /* t3 = node * 0x40000 */
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/arch/mips/include/asm/octeon/ |
H A D | cvmx-spxx-defs.h | 213 uint64_t mul:1; member in struct:cvmx_spxx_int_dat::cvmx_spxx_int_dat_s
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/arch/m68k/ifpsp060/src/ |
H A D | ilsp.S | 480 # _060LSP__imulu64_(): Emulate 64-bit unsigned mul instruction # 481 # _060LSP__imuls64_(): Emulate 64-bit signed mul instruction. # 484 # and therefore does not work exactly like the 680X0 mul{s,u}.l #
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/arch/microblaze/boot/dts/ |
H A D | system.dts | 125 xlnx,use-hw-mul = <0x2>;
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/arch/microblaze/platform/generic/ |
H A D | system.dts | 125 xlnx,use-hw-mul = <0x2>;
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