/arch/arm/mach-bcmring/csp/chipc/ |
H A D | chipcHw_str.c | 51 * @brief Retrieves a string representation of the mux setting for a pin. 57 const char *chipcHw_getGpioPinFunctionStr(int pin) argument 59 if ((pin < 0) || (pin >= chipcHw_GPIO_COUNT)) { 63 return gMuxStr[chipcHw_getGpioPinFunction(pin)];
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/arch/arm/plat-samsung/include/plat/ |
H A D | gpio-fns.h | 29 static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg) argument 32 s3c_gpio_cfgpin(pin, cfg); 42 extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); 46 * turn the given pin number into the corresponding IRQ number 49 * < 0 = no interrupt for this pin 50 * >=0 = interrupt number for the pin 53 extern int s3c2410_gpio_getirq(unsigned int pin); 57 * set the irq filtering on the given pin 68 extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, 81 * configure the pull-up control on the given pin [all...] |
/arch/mips/include/asm/mach-pnx833x/ |
H A D | gpio.h | 55 /* Select GPIO direction for a pin */ 56 static inline void pnx833x_gpio_select_input(unsigned int pin) argument 58 if (pin < 32) 59 CLEAR_REG_BIT(PNX833X_PIO_DIR, pin); 61 CLEAR_REG_BIT(PNX833X_PIO_DIR2, pin & 31); 63 static inline void pnx833x_gpio_select_output(unsigned int pin) argument 65 if (pin < 32) 66 SET_REG_BIT(PNX833X_PIO_DIR, pin); 68 SET_REG_BIT(PNX833X_PIO_DIR2, pin & 31); 71 /* Select GPIO or alternate function for a pin */ 72 pnx833x_gpio_select_function_io(unsigned int pin) argument 79 pnx833x_gpio_select_function_alt(unsigned int pin) argument 88 pnx833x_gpio_read(unsigned int pin) argument 97 pnx833x_gpio_write(unsigned int val, unsigned int pin) argument 119 pnx833x_gpio_setup_irq(int when, unsigned int pin) argument 156 pnx833x_gpio_enable_irq(unsigned int pin) argument 160 pnx833x_gpio_disable_irq(unsigned int pin) argument 166 pnx833x_gpio_clear_irq(unsigned int pin) argument [all...] |
/arch/arm/mach-s3c24xx/include/mach/ |
H A D | gpio-track.h | 22 static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin) argument 26 if (pin > S3C_GPIO_END) 29 chip = &s3c24xx_gpios[pin/32]; 30 return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
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H A D | hardware.h | 22 extern int s3c2440_set_dsc(unsigned int pin, unsigned int value); 28 extern int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state);
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/arch/blackfin/include/asm/ |
H A D | reboot.h | 18 extern void bfin_reset_boot_spi_cs(unsigned short pin);
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/arch/arm/plat-s3c24xx/ |
H A D | pm.c | 86 * check to see if the pin is configured correctly for sleep mode, and 90 static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) argument 94 int irq = gpio_to_irq(pin); 101 pinstate = s3c_gpio_getcfg(pin); 105 S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin); 108 S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); 109 s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); 121 int pin; local [all...] |
/arch/sh/drivers/pci/ |
H A D | fixups-sdk7780.c | 30 int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) argument 32 return sdk7780_irq_tab[pin-1][slot];
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H A D | fixups-cayman.c | 8 int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument 33 int pin; member in struct:slot_pin 40 pin = path[i].pin = pci_swizzle_interrupt_pin(dev, pin); 54 result = IRQ_INTA + pci_swizzle_interrupt_pin(dev, pin) - 1; 58 pin = path[i].pin; 66 pin = path[i].pin; [all...] |
H A D | fixups-snapgear.c | 21 int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) argument 34 printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n", 35 slot, pin - 1 + 'A', irq);
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/arch/arm/mach-mmp/include/mach/ |
H A D | mfp.h | 28 #define MFP_CFG(pin, af) \ 29 (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) 31 #define MFP_CFG_DRV(pin, af, drv) \ 32 (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv)
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/arch/arm/plat-orion/include/plat/ |
H A D | gpio.h | 20 void orion_gpio_set_unused(unsigned pin); 21 void orion_gpio_set_blink(unsigned pin, int blink); 25 void orion_gpio_set_valid(unsigned pin, int mode);
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/arch/avr32/mach-at32ap/include/mach/ |
H A D | portmux.h | 14 * Set up pin multiplexing, called from board init only. 16 * The following flags determine the initial state of the pin. 24 void at32_select_periph(unsigned int port, unsigned int pin, 26 void at32_select_gpio(unsigned int pin, unsigned long flags); 27 void at32_deselect_pin(unsigned int pin);
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/arch/arm/mach-s3c2412/ |
H A D | gpio.c | 29 int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state) argument 31 struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); 32 unsigned long offs = pin - chip->chip.base; 38 if (pin < S3C2410_GPB(0)) 41 if (pin >= S3C2410_GPF(0) && 42 pin <= S3C2410_GPG(16)) 45 if (pin > S3C2410_GPH(16))
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/arch/arm/mach-pnx4008/ |
H A D | gpio.c | 119 int pnx4008_gpio_register_pin(unsigned short pin) argument 121 unsigned long bit = GPIO_BIT(pin); 126 if (GPIO_ISBID(pin)) { 131 } else if (GPIO_ISRAM(pin)) { 136 } else if (GPIO_ISMUX(pin)) { 141 } else if (GPIO_ISOUT(pin)) { 146 } else if (GPIO_ISIN(pin)) { 161 int pnx4008_gpio_unregister_pin(unsigned short pin) argument 163 unsigned long bit = GPIO_BIT(pin); 168 if (GPIO_ISBID(pin)) { 199 pnx4008_gpio_read_pin(unsigned short pin) argument 227 pnx4008_gpio_write_pin(unsigned short pin, int output) argument 254 pnx4008_gpio_set_pin_direction(unsigned short pin, int output) argument 270 pnx4008_gpio_read_pin_direction(unsigned short pin) argument 287 pnx4008_gpio_set_pin_mux(unsigned short pin, int output) argument 311 pnx4008_gpio_read_pin_mux(unsigned short pin) argument [all...] |
/arch/arm/mach-orion5x/ |
H A D | rd88f5182-setup.c | 108 int pin; local 111 pin = RD88F5182_GPIO_DBG_LED; 113 if (gpio_request(pin, "DBGLED") == 0) { 114 if (gpio_direction_output(pin, 0) != 0) { 116 "to set output pin %d\n", pin); 117 gpio_free(pin); 122 "to request gpio %d\n", pin); 142 int pin; local 147 pin 174 rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument [all...] |
/arch/arm/plat-mxc/ |
H A D | iomux-v1.c | 60 unsigned int port, unsigned int pin, int on) 62 unsigned long mask = 1 << pin; 68 unsigned int port, unsigned int pin, int out) 70 unsigned long mask = 1 << pin; 76 unsigned int port, unsigned int pin, int af) 78 unsigned long mask = 1 << pin; 84 unsigned int port, unsigned int pin, int inuse) 86 unsigned long mask = 1 << pin; 92 unsigned int port, unsigned int pin, unsigned int ocr) 94 unsigned long shift = (pin 59 imx_iomuxv1_set_puen( unsigned int port, unsigned int pin, int on) argument 67 imx_iomuxv1_set_ddir( unsigned int port, unsigned int pin, int out) argument 75 imx_iomuxv1_set_gpr( unsigned int port, unsigned int pin, int af) argument 83 imx_iomuxv1_set_gius( unsigned int port, unsigned int pin, int inuse) argument 91 imx_iomuxv1_set_ocr( unsigned int port, unsigned int pin, unsigned int ocr) argument 102 imx_iomuxv1_set_iconfa( unsigned int port, unsigned int pin, unsigned int aout) argument 113 imx_iomuxv1_set_iconfb( unsigned int port, unsigned int pin, unsigned int bout) argument 126 unsigned int pin = gpio_mode & GPIO_PIN_MASK; local [all...] |
/arch/mips/include/asm/vr41xx/ |
H A D | giu.h | 44 extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, 52 extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level); 60 extern int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull);
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/arch/mips/powertv/pci/ |
H A D | fixup-powertv.c | 7 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument 9 return asic_pcie_map_irq(dev, slot, pin); 24 * pin - pin number (not used) 33 int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
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H A D | powertv-pci.h | 26 extern int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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/arch/mips/include/asm/mach-powertv/ |
H A D | powertv-clock.h | 24 extern int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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/arch/arm/plat-orion/ |
H A D | gpio.c | 87 __set_direction(struct orion_gpio_chip *ochip, unsigned pin, int input) argument 93 u |= 1 << pin; 95 u &= ~(1 << pin); 99 static void __set_level(struct orion_gpio_chip *ochip, unsigned pin, int high) argument 105 u |= 1 << pin; 107 u &= ~(1 << pin); 112 __set_blinking(struct orion_gpio_chip *ochip, unsigned pin, int blink) argument 118 u |= 1 << pin; 120 u &= ~(1 << pin); 125 orion_gpio_is_valid(struct orion_gpio_chip *ochip, unsigned pin, in argument 146 orion_gpio_request(struct gpio_chip *chip, unsigned pin) argument 158 orion_gpio_direction_input(struct gpio_chip *chip, unsigned pin) argument 174 orion_gpio_get(struct gpio_chip *chip, unsigned pin) argument 190 orion_gpio_direction_output(struct gpio_chip *chip, unsigned pin, int value) argument 208 orion_gpio_set(struct gpio_chip *chip, unsigned pin, int value) argument 219 orion_gpio_to_irq(struct gpio_chip *chip, unsigned pin) argument 231 orion_gpio_chip_find(int pin) argument 246 orion_gpio_set_unused(unsigned pin) argument 260 orion_gpio_set_valid(unsigned pin, int mode) argument 283 orion_gpio_set_blink(unsigned pin, int blink) argument 330 int pin; local [all...] |
/arch/arm/mach-integrator/ |
H A D | pci.c | 64 * Where A = pin 1, B = pin 2 and so on and pin=0 = default = A. 65 * Thus, each swizzle is ((pin-1) + (device#-4)) % 4 73 int pin = *pinp; local 75 if (pin == 0) 76 pin = 1; 79 pin = pci_swizzle_interrupt_pin(dev, pin); 85 *pinp = pin; 98 integrator_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument [all...] |
/arch/mips/pci/ |
H A D | fixup-wrppmc.c | 28 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument 30 return pci_irq_tab[slot][pin];
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H A D | fixup-yosemite.c | 29 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument 31 if (pin == 0)
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