Searched refs:registers (Results 1 - 25 of 128) sorted by relevance

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/arch/frv/include/asm/
H A Dsigcontext.h14 #include <asm/registers.h>
H A Duser.h15 #include <asm/registers.h>
21 * registers, and until these are solved you will not be able to view
24 * floating point registers contain.
31 * some point. All of the registers are stored as part of the
56 /* We start with the registers, to mimic the way that "memory" is returned
H A Dptrace.h14 #include <asm/registers.h>
/arch/microblaze/include/asm/
H A Dcache.h16 #include <asm/registers.h>
H A Dirqflags.h13 #include <asm/registers.h>
/arch/hexagon/include/asm/
H A Dtraps.h24 #include <asm/registers.h>
H A Dptrace.h24 #include <asm/registers.h>
H A Dprocessor.h27 #include <asm/registers.h>
H A Dthread_info.h28 #include <asm/registers.h>
/arch/x86/um/os-Linux/
H A DMakefile6 obj-y = registers.o task_size.o mcontext.o
/arch/sh/kernel/
H A Dirq_64.c12 #include <cpu/registers.h>
/arch/mn10300/mm/
H A Dmisalignment.c43 static int misalignment_addr(unsigned long *registers, unsigned long sp,
49 static int misalignment_reg(unsigned long *registers, unsigned params,
321 unsigned long *registers = (unsigned long *) regs; local
495 if (!misalignment_addr(registers, sp,
500 if (!misalignment_reg(registers, pop->params[1], opcode, disp,
516 if (!misalignment_reg(registers, pop->params[0], opcode, disp,
520 if (!misalignment_addr(registers, sp,
548 static int misalignment_addr(unsigned long *registers, unsigned long sp, argument
567 postinc = &registers[Dreg_index[opcode & 0x03]];
571 postinc = &registers[Dreg_inde
677 misalignment_reg(unsigned long *registers, unsigned params, unsigned opcode, unsigned long disp, unsigned long **_register) argument
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H A DKconfig.cache62 bool "Use the cache tag registers directly"
66 bool "Flush areas by way of automatic purge registers (AM34 only)"
113 icache using the cache tag registers to make breakpoints work.
122 icache using automatic purge registers to make breakpoints work.
131 tag registers to make breakpoints work.
140 purge registers to make breakpoints work.
/arch/sh/boards/mach-cayman/
H A Dpanic.c11 #include <cpu/registers.h>
/arch/sh/include/asm/
H A Dmmu_context_64.h14 #include <cpu/registers.h>
/arch/um/os-Linux/
H A DMakefile7 registers.o sigio.o signal.o start_up.o time.o tty.o \
13 main.o mem.o process.o registers.o sigio.o signal.o start_up.o time.o \
/arch/cris/arch-v10/kernel/
H A Dkgdb.c115 * be removed in future by introducing a stack of struct registers.
130 * g return the value of the CPU registers hex data or ENN
131 * G set the value of the CPU registers OK or ENN
185 /* Use the order of registers as defined in "AXIS ETRAX CRIS Programmer's
188 There are 16 general 32-bit registers, R0-R15, where R14 is the stack
190 There are 16 special registers, P0-P15, where three of the unimplemented
191 registers, P0, P4 and P8, are reserved as zero-registers. A read from
192 any of these registers returns zero and a write has no effect. */
231 } registers; typedef in typeref:struct:register_image
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/arch/arm/include/asm/
H A Dvfpmacros.h19 @ read all the working registers back into the VFP
36 cmp \tmp, #2 @ 32 x 64bit registers?
43 @ write all the working registers out of the VFP
60 cmp \tmp, #2 @ 32 x 64bit registers?
/arch/arm/mach-ks8695/include/mach/
H A Ddebug-macro.S28 tst \rd, #URLS_URTE @ Holding & Shift registers empty?
/arch/s390/kernel/
H A Dhead31.S26 lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
56 .long 0 # cr8: access registers translation
93 # check control registers
/arch/arm/mach-omap2/
H A Dsleep24xx.S51 stmfd sp!, {r0, lr} @ save registers on stack
87 stmfd sp!, {r0 - r12, lr} @ save registers on stack
/arch/arm/mach-lpc32xx/
H A Dsuspend.S40 @ Save a copy of the used registers in IRAM, r0 is corrupted
/arch/cris/boot/compressed/
H A Dhead_v32.S2 * Code that sets up the DRAM registers, calls the
26 ;; Initialize the DRAM registers.
/arch/frv/kernel/
H A Dhead-uc-fr451.S39 # set the protection map with the I/DAMPR registers
58 # set the I/O region protection registers for FR401/3/5
67 # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible
68 # - start with the highest numbered registers
/arch/hexagon/kernel/
H A Dsyscall.c31 #include <asm/registers.h>

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