Searched refs:ssp1_clk (Results 1 - 3 of 3) sorted by relevance

/arch/arm/mach-mxs/
H A Dclock-mx28.c292 _CLK_GET_RATE1(ssp1_clk, SSP1)
403 _CLK_SET_RATE(ssp1_clk, SSP1, FRAC0, IO0)
504 _CLK_SET_PARENT(ssp1_clk, SSP1)
591 _DEFINE_CLOCK(ssp1_clk, SSP1, CLKGATE, &ref_xtal_clk);
631 _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp1_clk)
666 ssp1_clk.parent = (reg & BM_CLKCTRL_CLKSEQ_BYPASS_SSP1) ?
775 clk_set_parent(&ssp1_clk, &ref_io0_clk);
/arch/arm/mach-spear6xx/
H A Dclock.c584 static struct clk ssp1_clk = { variable in typeref:struct:clk
668 { .dev_id = "ssp-pl022.1", .clk = &ssp1_clk},
/arch/arm/mach-spear3xx/
H A Dclock.c632 static struct clk ssp1_clk = { variable in typeref:struct:clk
730 { .dev_id = "ssp-pl022.1", .clk = &ssp1_clk},

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