Searched refs:DMA_CONTROL (Results 1 - 6 of 6) sorted by relevance

/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac_lib.c52 u32 value = readl(ioaddr + DMA_CONTROL);
54 writel(value, ioaddr + DMA_CONTROL);
59 u32 value = readl(ioaddr + DMA_CONTROL);
61 writel(value, ioaddr + DMA_CONTROL);
66 u32 value = readl(ioaddr + DMA_CONTROL);
68 writel(value, ioaddr + DMA_CONTROL);
73 u32 value = readl(ioaddr + DMA_CONTROL);
75 writel(value, ioaddr + DMA_CONTROL);
224 u32 csr6 = readl(ioaddr + DMA_CONTROL);
225 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);
[all...]
H A Ddwmac1000_dma.c74 u32 csr6 = readl(ioaddr + DMA_CONTROL);
119 writel(csr6, ioaddr + DMA_CONTROL);
H A Ddwmac100_dma.c74 u32 csr6 = readl(ioaddr + DMA_CONTROL);
83 writel(csr6, ioaddr + DMA_CONTROL);
H A Ddwmac_dma.h32 #define DMA_CONTROL 0x00001018 /* Ctrl (Operational Mode) */ macro
/drivers/media/dvb/ddbridge/
H A Dddbridge-regs.h120 #define DMA_CONTROL (0x00) /* 64 */ macro
/drivers/memstick/host/
H A Djmb38x_ms.c30 DMA_CONTROL = 0x08, enumerator in enum:__anon1690
435 writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL);
487 writel(0, host->addr + DMA_CONTROL);

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