Searched refs:DMA_CONTROL (Results 1 - 6 of 6) sorted by relevance
/drivers/net/ethernet/stmicro/stmmac/ |
H A D | dwmac_lib.c | 52 u32 value = readl(ioaddr + DMA_CONTROL); 54 writel(value, ioaddr + DMA_CONTROL); 59 u32 value = readl(ioaddr + DMA_CONTROL); 61 writel(value, ioaddr + DMA_CONTROL); 66 u32 value = readl(ioaddr + DMA_CONTROL); 68 writel(value, ioaddr + DMA_CONTROL); 73 u32 value = readl(ioaddr + DMA_CONTROL); 75 writel(value, ioaddr + DMA_CONTROL); 224 u32 csr6 = readl(ioaddr + DMA_CONTROL); 225 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL); [all...] |
H A D | dwmac1000_dma.c | 74 u32 csr6 = readl(ioaddr + DMA_CONTROL); 119 writel(csr6, ioaddr + DMA_CONTROL);
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H A D | dwmac100_dma.c | 74 u32 csr6 = readl(ioaddr + DMA_CONTROL); 83 writel(csr6, ioaddr + DMA_CONTROL);
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H A D | dwmac_dma.h | 32 #define DMA_CONTROL 0x00001018 /* Ctrl (Operational Mode) */ macro
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/drivers/media/dvb/ddbridge/ |
H A D | ddbridge-regs.h | 120 #define DMA_CONTROL (0x00) /* 64 */ macro
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/drivers/memstick/host/ |
H A D | jmb38x_ms.c | 30 DMA_CONTROL = 0x08, enumerator in enum:__anon1690 435 writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL); 487 writel(0, host->addr + DMA_CONTROL);
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Completed in 383 milliseconds