Searched refs:INTR_ENABLE (Results 1 - 6 of 6) sorted by relevance
/drivers/gpio/ |
H A D | gpio-msm-v2.c | 62 * - Second, INTR_ENABLE controls whether an interrupt is triggered. 64 * If INTR_ENABLE is set and INTR_RAW_STATUS_EN is NOT set, an interrupt 68 INTR_ENABLE = 0, enumerator in enum:__anon512 252 clear_gpio_bits(INTR_RAW_STATUS_EN | INTR_ENABLE, GPIO_INTR_CFG(gpio)); 264 set_gpio_bits(INTR_RAW_STATUS_EN | INTR_ENABLE, GPIO_INTR_CFG(gpio));
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/drivers/block/ |
H A D | swim3.c | 98 #define INTR_ENABLE 0x01 macro 955 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE); 995 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
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/drivers/net/ethernet/ |
H A D | jme.c | 379 jwrite32(jme, JME_IENS, INTR_ENABLE); 388 jwrite32f(jme, JME_IENC, INTR_ENABLE); 1532 jwrite32f(jme, JME_IENC, INTR_ENABLE); 1584 jwrite32f(jme, JME_IENS, INTR_ENABLE); 1599 if (unlikely((intrstat & INTR_ENABLE) == 0))
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H A D | jme.h | 1085 static const u32 INTR_ENABLE = INTR_SWINTR | variable
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/drivers/scsi/qla4xxx/ |
H A D | ql4_fw.h | 340 #define INTR_ENABLE 1 macro
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H A D | ql4_nx.c | 2289 mbox_cmd[1] = INTR_ENABLE;
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