Searched refs:SGE_TIMER_VALUE_0_AND_1 (Results 1 - 3 of 3) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_regs.h176 #define SGE_TIMER_VALUE_0_AND_1 0x10b8 macro
H A Dsge.c2430 t4_write_reg(adap, SGE_TIMER_VALUE_0_AND_1,
/drivers/net/ethernet/chelsio/cxgb4vf/
H A Dt4vf_hw.c454 FW_PARAMS_PARAM_XYZ(SGE_TIMER_VALUE_0_AND_1));

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