Searched refs:SXFRCTL1 (Results 1 - 16 of 16) sorted by relevance

/drivers/scsi/aic7xxx_old/
H A Daic7xxx.seq61 and SXFRCTL1, ~BITBUCKET;
401 or SXFRCTL1,BITBUCKET;
429 test SXFRCTL1, BITBUCKET jnz data_phase_overrun;
437 test SXFRCTL1,BITBUCKET jnz data_phase_overrun;
584 and SXFRCTL1, ~BITBUCKET;
H A Daic7xxx_reg.h24 #define SXFRCTL1 0x02 macro
H A Daic7xxx.reg84 register SXFRCTL1 {
/drivers/scsi/
H A Daha152x.h17 #define SXFRCTL1 (HOSTIOPORT0+0x02) /* SCSI transfer control 1 */ macro
H A Daic7xxx_old.c7503 unsigned char sxfrctl1 = aic_inb(p, SXFRCTL1);
7556 * LVD/Primary Low Term Enable = STPWEN bit in SXFRCTL1
7595 * SXFRCTL1 register. Since the Adaptec docs typically say the
7771 aic_outb(p, sxfrctl1, SXFRCTL1);
8035 * Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels
8043 term = (aic_inb(p, SXFRCTL1) & STPWEN);
8051 ENSTIMER | ACTNEGEN, SXFRCTL1); local
8069 term = (aic_inb(p, SXFRCTL1) & STPWEN);
8075 ENSTIMER | ACTNEGEN, SXFRCTL1); local
9357 sxfrctl1 = aic_inb(temp_p, SXFRCTL1);
[all...]
H A Daha152x.c1306 SETPORT(SXFRCTL1, 0);
1651 SETPORT(SXFRCTL1, (PARITY ? ENSPCHK : 0 ) | ENSTIMER);
/drivers/scsi/aic7xxx/
H A Daic79xx_pci.c705 sxfrctl1 = ahd_inb(ahd, SXFRCTL1) & ~STPWEN;
712 ahd_outb(ahd, SXFRCTL1, sxfrctl1|STPWEN);
713 ahd_outb(ahd, SXFRCTL1, sxfrctl1);
H A Daic7xxx_core.c826 ahc_outb(ahc, SXFRCTL1, ahc_inb(ahc, SXFRCTL1) & ~BITBUCKET);
1346 ahc_outb(ahc, SXFRCTL1,
1347 ahc_inb(ahc, SXFRCTL1) | BITBUCKET);
1355 ahc_outb(ahc, SXFRCTL1,
1356 ahc_inb(ahc, SXFRCTL1) & ~BITBUCKET);
4599 * Preserve the value of the SXFRCTL1 register for all channels.
4614 sxfrctl1_b = ahc_inb(ahc, SXFRCTL1);
4617 sxfrctl1_a = ahc_inb(ahc, SXFRCTL1);
4673 ahc_outb(ahc, SXFRCTL1, sxfrctl1_
[all...]
H A Daic7xxx_pci.c799 sxfrctl1 = ahc_inb(ahc, SXFRCTL1) & STPWEN;
1707 ahc_outb(ahc, SXFRCTL1, *sxfrctl1);
1744 ahc_outb(ahc, SXFRCTL1, *sxfrctl1);
H A Daic79xx.seq1664 or SXFRCTL1,BITBUCKET;
1667 and SXFRCTL1, ~BITBUCKET;
H A Daic7xxx.seq894 or SXFRCTL1,BITBUCKET;
900 and SXFRCTL1, ~BITBUCKET;
H A Daic7xxx.reg101 register SXFRCTL1 {
H A Daic7xxx_reg.h_shipped204 #define SXFRCTL1 0x02
H A Daic79xx_core.c1138 ahd_outb(ahd, SXFRCTL1, ahd_inb(ahd, SXFRCTL1) & ~BITBUCKET);
6262 * Preserve the value of the SXFRCTL1 register for all channels.
6269 sxfrctl1 = ahd_inb(ahd, SXFRCTL1);
6329 * Restore SXFRCTL1.
6336 ahd_outb(ahd, SXFRCTL1, sxfrctl1|STPWEN);
6337 ahd_outb(ahd, SXFRCTL1, sxfrctl1);
7312 /* Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1. */
7330 ahd_outb(ahd, SXFRCTL1, sxfrctl1|ahd->seltime|ENSTIMER|ACTNEGEN);
H A Daic79xx.reg1643 register SXFRCTL1 {
H A Daic79xx_reg.h_shipped1524 #define SXFRCTL1 0x3d

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