| /drivers/staging/rtl8192e/rtl8192e/ |
| H A D | rtl_debug.c | 340 (page0 | n), bMaskDWord));
368 (page0 | n), bMaskDWord));
395 (page0 | n), bMaskDWord));
422 (page0 | n), bMaskDWord));
449 (page0 | n), bMaskDWord));
476 (page0 | n), bMaskDWord));
503 (page0 | n), bMaskDWord));
530 bMaskDWord));
557 bMaskDWord));
584 bMaskDWord));
[all...] |
| H A D | r8192E_phy.h | 74 #define bMaskDWord 0xffffffff macro
|
| H A D | r8192E_phy.c | 87 if (dwBitMask != bMaskDWord) {
122 bMaskDWord,
129 bMaskDWord,
153 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord,
179 bMaskDWord,
186 bMaskDWord,
199 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
210 bMaskDWord,
382 bMaskDWord,
392 bMaskDWord,
[all...] |
| H A D | rtl_dm.c | 592 bMaskDWord,
601 bMaskDWord,
606 bMaskDWord,
610 bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
619 bMaskDWord,
624 bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
637 bMaskDWord,
644 bMaskDWord,
649 bMaskDWord,
653 bMaskDWord, pri
[all...] |
| H A D | r8192E_phyreg.h | 811 #define bMaskDWord 0xffffffff macro
|
| H A D | r819xE_phyreg.h | 863 #define bMaskDWord 0xffffffff macro
|
| H A D | r8192E_dev.c | 906 rOFDM0_XATxIQImbalance, bMaskDWord);
908 rOFDM0_XCTxIQImbalance, bMaskDWord);
|
| /drivers/staging/rtl8192u/ |
| H A D | r819xU_phy.h | 58 #define bMaskDWord 0xffffffff macro
|
| H A D | r819xU_phy.c | 91 if(dwBitMask!= bMaskDWord)
150 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
159 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
193 bMaskDWord,
236 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16));
243 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16));
259 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
274 bMaskDWord,
554 rtl8192_setBBreg(dev, rtl819XPHY_REG_1T2RArray[i], bMaskDWord, rtl819XPHY_REG_1T2RArray[i+1]);
562 rtl8192_setBBreg(dev, rtl819XAGCTAB_Array[i], bMaskDWord, rtl819XAGCTAB_Arra
[all...] |
| H A D | r8192U_dm.c | 733 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
740 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
755 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
760 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
830 tmpRegA= rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
927 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]);
1577 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1597 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1629 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1657 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVa
[all...] |
| H A D | r819xU_phyreg.h | 822 #define bMaskDWord 0xffffffff macro
|
| H A D | r8192U_core.c | 3505 u32 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
3506 // u32 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
|
| /drivers/staging/rtl8712/ |
| H A D | rtl871x_mp.c | 237 if (bitmask != bMaskDWord) {
262 if (bitmask != bMaskDWord) {
370 set_bb_reg(pAdapter, rFPGA0_AnalogParameter2, bMaskDWord, 0x58);
384 set_bb_reg(pAdapter, rFPGA0_AnalogParameter2, bMaskDWord, 0x18);
|
| H A D | rtl871x_mp_phy_regdef.h | 963 #define bMaskDWord 0xffffffff macro
|