Searched refs:cache_line_size (Results 1 - 7 of 7) sorted by relevance

/drivers/pci/hotplug/
H A Dpcihp_slot.c32 .cache_line_size = 8,
60 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp->cache_line_size);
H A Dacpi_pcihp.c65 hpx->t0->cache_line_size = fields[2].integer.value;
246 hpp->t0->cache_line_size = fields[0].integer.value;
/drivers/edac/
H A Di7core_edac.c2096 const int cache_line_size = 64; local
2104 cache_line_size * 1000000;
2136 const u32 cache_line_size = 64; local
2156 1000000 * cache_line_size;
/drivers/block/
H A Dcpqarray.c608 unchar cache_line_size, latency_timer; local
636 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
656 printk("cache_line_size = %x\n", cache_line_size);
/drivers/net/ethernet/mellanox/mlx4/
H A Dfw.c1009 (ilog2(cache_line_size()) - 4) << 5;
/drivers/scsi/
H A Dipr.c108 .cache_line_size = 0x20,
132 .cache_line_size = 0x20,
156 .cache_line_size = 0x20,
8846 ioa_cfg->chip_cfg->cache_line_size);
H A Dipr.h1309 u8 cache_line_size; member in struct:ipr_chip_cfg_t

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