Searched refs:clksrc (Results 1 - 8 of 8) sorted by relevance

/drivers/clocksource/
H A Dmmio.c15 struct clocksource clksrc; member in struct:clocksource_mmio
20 return container_of(c, struct clocksource_mmio, clksrc);
66 cs->clksrc.name = name;
67 cs->clksrc.rating = rating;
68 cs->clksrc.read = read;
69 cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
70 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
72 return clocksource_register_hz(&cs->clksrc, hz);
H A DMakefile12 obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.
H A Dtcb_clksrc.c64 static struct clocksource clksrc = { variable in typeref:struct:clocksource
274 tc = atmel_tc_alloc(CONFIG_ATMEL_TCB_CLKSRC_BLOCK, clksrc.name);
308 printk(bootinfo, clksrc.name, CONFIG_ATMEL_TCB_CLKSRC_BLOCK,
314 clksrc.read = tc_get_cycles32;
327 clocksource_register_hz(&clksrc, divided_rate);
H A Dclksrc-dbx500-prcmu.c16 #include <linux/clksrc-dbx500-prcmu.h>
/drivers/net/irda/
H A Dvlsi_ir.c79 /* clksrc: which clock source to be used
86 static int clksrc = 0; /* default is 0(auto) */ variable
87 module_param(clksrc, int, 0);
88 MODULE_PARM_DESC(clksrc, "clock input source selection");
354 seq_printf(seq, "clksrc: %s\n",
355 (clksrc>=2) ? ((clksrc==3)?"40MHz XCLK":"48MHz XCLK")
356 : ((clksrc==1)?"48MHz PLL":"autodetect"));
785 nphyctl = PHYCTL_MIR(clksrc==3);
802 nphyctl = PHYCTL_SIR(baudrate,sirpulse,clksrc
[all...]
/drivers/mmc/host/
H A Dsdhci-s3c.c144 struct clk *clksrc = ourhost->clk_bus[src]; local
147 if (!clksrc)
155 rate = clk_round_rate(clksrc, wanted);
159 rate = clk_get_rate(clksrc);
/drivers/mfd/
H A Dsm501.c510 int clksrc,
527 switch (clksrc) {
591 clock = clock & ~(0xFF << clksrc);
592 clock |= reg<<clksrc;
641 int clksrc,
648 switch (clksrc) {
509 sm501_set_clock(struct device *dev, int clksrc, unsigned long req_freq) argument
640 sm501_find_clock(struct device *dev, int clksrc, unsigned long req_freq) argument
/drivers/video/
H A Dsh_mipi_dsi.c298 (pdata->clksrc << 16) | (pctype << 12) | datatype,

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