Searched refs:cycle (Results 1 - 25 of 25) sorted by relevance

/drivers/ide/
H A Dide-timings.c85 u16 cycle = 0; local
89 cycle = id[ATA_ID_EIDE_PIO_IORDY];
91 cycle = id[ATA_ID_EIDE_PIO];
94 if (pio < 3 && cycle < t->cycle)
95 cycle = 0; /* use standard timing */
99 cycle = 0;
102 return cycle ? cycle : t->cycle;
[all...]
H A Dtx4938ide.c30 unsigned int cycle = 1000000000 / clock; local
35 wt = DIV_ROUND_UP(t->act8b, cycle) - 2;
37 wt = max_t(int, wt, DIV_ROUND_UP(35, cycle));
38 /* actual wait-cycle is max(wt & ~1, 1) */
43 shwt = DIV_ROUND_UP(t->setup, cycle);
45 /* -DIOx recovery time (SHWT * 4) and cycle time requirement */
46 while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle)
52 pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n",
53 ebus_ch, cycle, w
[all...]
H A Dpalm_bk3710.c122 cycletime = max_t(int, t->cycle, min_cycle);
254 * (ATA_MISCCTL_HWNHLD1P , 1 cycle)
255 * (ATA_MISCCTL_HWNHLD0P , 1 cycle)
/drivers/staging/vme/devices/
H A Dvme_user.h14 u32 cycle; /* Cycle properties */ member in struct:vme_master
38 u32 cycle; /* Cycle properties */ member in struct:vme_slave
H A Dvme_user.c497 /* XXX We do not want to push aspace, cycle and width
503 &master.cycle, &master.dwidth);
525 /* XXX We do not want to push aspace, cycle and width
530 master.aspace, master.cycle, master.dwidth);
540 /* XXX We do not want to push aspace, cycle and width
546 &slave.cycle);
568 /* XXX We do not want to push aspace, cycle and width
574 slave.cycle);
/drivers/ata/
H A Dpata_at91.c96 * @cycle: SMC_CYCLE register value
107 * SMC_CYCLE = 256*cycle[8:7] + cycle[6:0]
110 int *setup, int *pulse, int *cycle, int *cs_pulse)
133 *cycle += ret_val;
139 *cycle += ret_val;
141 ret_val = adjust_smc_value(cycle, range_cycle, ARRAY_SIZE(range_cycle));
145 *cs_pulse = *cycle;
156 *cycle = *cs_pulse;
168 * @cycle
109 calc_smc_vals(struct device *dev, int *setup, int *pulse, int *cycle, int *cs_pulse) argument
171 to_smc_format(int *setup, int *pulse, int *cycle, int *cs_pulse) argument
212 unsigned int cycle; /* SMC Cycle width in MCK ticks */ local
[all...]
H A Dpata_icside.c165 * calculate the cycle time based on the transfer mode, and the EIDE
191 unsigned int cycle; local
201 * Choose the IOMD cycle timing which ensure that the interface
202 * satisfies the measured active, recovery and cycle times.
204 if (t.active <= 50 && t.recover <= 375 && t.cycle <= 425)
205 iomd_type = 'D', cycle = 187;
206 else if (t.active <= 125 && t.recover <= 375 && t.cycle <= 500)
207 iomd_type = 'C', cycle = 250;
208 else if (t.active <= 200 && t.recover <= 550 && t.cycle <= 750)
209 iomd_type = 'B', cycle
[all...]
H A Dpata_acpi.c124 acpi->gtm.drive[unit].pio = t->cycle;
151 acpi->gtm.drive[unit].dma = t->cycle;
H A Dlibata-core.c1813 /* This is cycle times not frequency - watch the logic! */
1814 if (pio > 240) /* PIO2 is 240nS per cycle */
2894 q->cycle = EZ(t->cycle * 1000, T);
2908 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2942 * PIO/MW_DMA cycle timing.
2950 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
2953 p.cycle
3016 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle) argument
[all...]
H A Dpata_octeon_cf.c128 pause = timing.cycle - timing.active - timing.setup - trh;
153 /* Time to wait to complete the cycle. */
190 T0 = timing->cycle;
/drivers/staging/vme/bridges/
H A Dvme_tsi148.c554 dma_addr_t pci_base, u32 aspace, u32 cycle)
647 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) {
659 /* Setup cycle types */
661 if (cycle & VME_BLT)
663 if (cycle & VME_MBLT)
665 if (cycle & VME_2eVME)
667 if (cycle & VME_2eSST)
669 if (cycle & VME_2eSSTB)
677 if (cycle & VME_SUPER)
679 if (cycle
552 tsi148_slave_set(struct vme_slave_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t pci_base, u32 aspace, u32 cycle) argument
702 tsi148_slave_get(struct vme_slave_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *pci_base, u32 *aspace, u32 *cycle) argument
895 tsi148_master_set(struct vme_master_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) argument
1131 __tsi148_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
1241 tsi148_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
1262 u32 aspace, cycle, dwidth; local
1302 u32 aspace, cycle, dwidth; local
1418 tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr, u32 aspace, u32 cycle, u32 dwidth) argument
1512 tsi148_dma_set_vme_dest_attributes(struct device *dev, u32 *attr, u32 aspace, u32 cycle, u32 dwidth) argument
1884 tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, u32 aspace, u32 cycle) argument
1951 tsi148_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, u32 *aspace, u32 *cycle) argument
[all...]
H A Dvme_ca91cx42.c341 dma_addr_t pci_base, u32 aspace, u32 cycle)
423 /* Setup cycle types */
425 if (cycle & VME_SUPER)
427 if (cycle & VME_USER)
429 if (cycle & VME_PROG)
431 if (cycle & VME_DATA)
447 dma_addr_t *pci_base, u32 *aspace, u32 *cycle)
474 *cycle = 0;
491 *cycle |= VME_SUPER;
493 *cycle |
339 ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t pci_base, u32 aspace, u32 cycle) argument
445 ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *pci_base, u32 *aspace, u32 *cycle) argument
597 ca91cx42_master_set(struct vme_master_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) argument
754 __ca91cx42_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
841 ca91cx42_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
1294 ca91cx42_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, u32 aspace, u32 cycle) argument
1362 ca91cx42_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, u32 *aspace, u32 *cycle) argument
[all...]
/drivers/staging/vme/
H A Dvme.c156 u32 aspace, cycle, dwidth; local
161 &aspace, &cycle, &dwidth);
167 &buf_base, &aspace, &cycle);
234 u32 cycle)
261 ((slave_image->cycle_attr & cycle) == cycle) &&
299 dma_addr_t buf_base, u32 aspace, u32 cycle)
318 ((image->cycle_attr & cycle) == cycle))) {
328 aspace, cycle);
233 vme_slave_request(struct vme_dev *vdev, u32 address, u32 cycle) argument
297 vme_slave_set(struct vme_resource *resource, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t buf_base, u32 aspace, u32 cycle) argument
332 vme_slave_get(struct vme_resource *resource, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *buf_base, u32 *aspace, u32 *cycle) argument
389 vme_master_request(struct vme_dev *vdev, u32 address, u32 cycle, u32 dwidth) argument
456 vme_master_set(struct vme_resource *resource, int enabled, unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) argument
492 vme_master_get(struct vme_resource *resource, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
820 vme_dma_vme_attribute(unsigned long long address, u32 aspace, u32 cycle, u32 dwidth) argument
1171 vme_lm_set(struct vme_resource *resource, unsigned long long lm_base, u32 aspace, u32 cycle) argument
1193 vme_lm_get(struct vme_resource *resource, unsigned long long *lm_base, u32 *aspace, u32 *cycle) argument
[all...]
H A Dvme_bridge.h47 u32 cycle; member in struct:vme_dma_vme
/drivers/staging/media/lirc/
H A Dlirc_bt829.c46 static void cycle_delay(int cycle);
168 static void cycle_delay(int cycle) argument
170 udelay(WAIT_CYCLE*cycle);
/drivers/video/
H A Dacornfb.c177 u_int sync_len, display_start, display_end, cycle; local
235 cycle = display_end + var->right_margin;
242 if (cycle & 2) {
243 cycle += 2;
248 vidc.h_cycle = (cycle - 2) / 2;
259 cycle = display_end + var->lower_margin;
262 cycle = (cycle - 3) / 2;
264 cycle = cycle
[all...]
/drivers/firewire/
H A Dcore-iso.c169 int cycle, int sync, int tags)
171 return ctx->card->driver->start_iso(ctx, cycle, sync, tags);
168 fw_iso_context_start(struct fw_iso_context *ctx, int cycle, int sync, int tags) argument
H A Dcore.h98 s32 cycle, u32 sync, u32 tags);
H A Dcore-cdev.c923 static void iso_callback(struct fw_iso_context *context, u32 cycle, argument
936 e->interrupt.cycle = cycle;
1158 a->cycle, a->sync, a->tags);
H A Dcore-card.c440 * make sure we have an active cycle master and do gap count
468 * cycle master capable.
507 * Make sure that the cycle master sends cycle start packets.
633 s32 cycle, u32 sync, u32 tags)
632 dummy_start_iso(struct fw_iso_context *ctx, s32 cycle, u32 sync, u32 tags) argument
H A Dohci.c329 ", nonatomic cycle timer = " __stringify(QUIRK_CYCLE_TIMER)
453 [0x8] = "cycle start", [0x9] = "Lk req",
1676 * iso cycle timer register:
1722 * the most significant bit of the cycle timer in bit 6 so that we can detect
1874 * If the invalid data looks like a cycle start packet,
1875 * it's likely to be the result of the cycle master
2080 "isochronous cycle too long\n");
2094 "isochronous cycle inconsistent\n");
2600 * We might be called just after the cycle timer has wrapped
2986 s32 cycle, u3
2985 ohci_start_iso(struct fw_iso_context *base, s32 cycle, u32 sync, u32 tags) argument
[all...]
H A Dnet.c827 u32 cycle, size_t header_length, void *header, void *data)
826 fwnet_receive_broadcast(struct fw_iso_context *context, u32 cycle, size_t header_length, void *header, void *data) argument
/drivers/scsi/
H A Desp_scsi.h228 #define ESP_TICK(ccf, cycle) ((7682 * (ccf) * (cycle) / 1000))
/drivers/media/dvb/firewire/
H A Dfiredtv-fw.c97 static void handle_iso(struct fw_iso_context *context, u32 cycle, argument
/drivers/media/dvb/siano/
H A Dsmscoreapi.h386 u32 BurstCycleTime; /* Current burst cycle time in mSec,
388 u32 CalculatedBurstCycleTime;/* Current burst cycle time in mSec,
507 u32 cycle; member in struct:PID_STATISTICS_DATA_S::PID_BURST_S

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