Searched refs:inst (Results 1 - 25 of 34) sorted by relevance

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/drivers/net/ethernet/broadcom/
H A Dbnx2_fw.h20 .inst = BNX2_COM_CPU_INSTRUCTION,
36 .inst = BNX2_CP_CPU_INSTRUCTION,
52 .inst = BNX2_RXP_CPU_INSTRUCTION,
68 .inst = BNX2_TPAT_CPU_INSTRUCTION,
84 .inst = BNX2_TXP_CPU_INSTRUCTION,
/drivers/gpu/drm/nouveau/
H A Dnva3_copy.c83 u32 inst; local
85 inst = (chan->ramin->vinst >> 12);
86 inst |= 0x40000000;
91 if (nv_rd32(dev, 0x104050) == inst)
94 if (nv_rd32(dev, 0x104054) == inst)
99 for (inst = 0xc0; inst <= 0xd4; inst += 4)
100 nv_wo32(chan->ramin, inst, 0x00000000);
169 u32 inst local
[all...]
H A Dnv84_crypt.c69 u32 inst; local
71 inst = (chan->ramin->vinst >> 12);
72 inst |= 0x80000000;
79 if (nv_rd32(dev, 0x102188) == inst)
81 if (nv_rd32(dev, 0x10218c) == inst)
126 u32 inst = nv_rd32(dev, 0x102188) & 0x7fffffff; local
131 stat, mthd, data, inst);
H A Dnv31_mpeg.c92 u32 inst = 0x80000000 | (ctx->pinst >> 4); local
96 if (nv_rd32(dev, 0x00b318) == inst)
174 u32 inst = data << 4; local
175 u32 dma0 = nv_ri32(dev, inst + 0);
176 u32 dma1 = nv_ri32(dev, inst + 4);
177 u32 dma2 = nv_ri32(dev, inst + 8);
209 nv31_mpeg_isr_chid(struct drm_device *dev, u32 inst) argument
226 if (ctx && ctx->pinst == inst)
247 u32 inst = (nv_rd32(dev, 0x00b318) & 0x000fffff) << 4; local
248 u32 chid = nv31_mpeg_isr_chid(dev, inst);
[all...]
H A Dnvc0_copy.c78 u32 inst; local
80 inst = (chan->ramin->vinst >> 12);
81 inst |= 0x40000000;
86 if (nv_rd32(dev, pcopy->fuc + 0x050) == inst)
89 if (nv_rd32(dev, pcopy->fuc + 0x054) == inst)
159 u64 inst = (u64)(nv_rd32(dev, pcopy->fuc + 0x050) & 0x0fffffff) << 12; local
160 u32 chid = nvc0_graph_isr_chid(dev, inst);
171 chid, inst, subc, mthd, data);
H A Dnv50_graph.c58 uint32_t inst; local
67 inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);
68 if (!(inst & NV50_PGRAPH_CTXCTL_CUR_LOADED))
70 inst = (inst & NV50_PGRAPH_CTXCTL_CUR_INSTANCE) << 12;
75 if (chan && chan->ramin && chan->ramin->vinst == inst)
83 nv50_graph_do_load_context(struct drm_device *dev, uint32_t inst) argument
88 nv_wr32(dev, 0x400784, inst);
97 nv_wr32(dev, 0x40032c, inst | (1<<31));
106 uint32_t inst; local
330 uint32_t inst; local
690 nv50_pgraph_trap_handler(struct drm_device *dev, u32 display, u64 inst, u32 chid) argument
901 nv50_graph_isr_chid(struct drm_device *dev, u64 inst) argument
927 u64 inst = (u64)(nv_rd32(dev, 0x40032c) & 0x0fffffff) << 12; local
[all...]
H A Dnv40_graph.c83 u32 inst = 0x01000000 | (grctx->pinst >> 4); local
88 if (nv_rd32(dev, 0x40032c) == inst)
90 if (nv_rd32(dev, 0x400330) == inst)
351 u32 inst = nv_rd32(dev, 0x40032c); local
352 if (inst & 0x01000000) {
354 nv_wr32(dev, 0x400784, inst);
367 nv40_graph_isr_chid(struct drm_device *dev, u32 inst) argument
380 if (grctx && grctx->pinst == inst)
395 u32 inst = (nv_rd32(dev, 0x40032c) & 0x000fffff) << 4; local
396 u32 chid = nv40_graph_isr_chid(dev, inst);
[all...]
H A Dnv50_mpeg.c84 u32 inst, i; local
89 inst = chan->ramin->vinst >> 12;
90 inst |= 0x80000000;
94 if (nv_rd32(dev, 0x00b318) == inst)
H A Dnouveau_grctx.h23 cp_out(struct nouveau_grctx *ctx, uint32_t inst) argument
31 ctxprog[ctx->ctxprog_len++] = inst;
H A Dnv50_fifo.c66 uint32_t inst; local
71 inst = chan->ramfc->vinst >> 12;
73 inst = chan->ramfc->vinst >> 8;
75 nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel), inst |
83 uint32_t inst; local
88 inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G80;
90 inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G84;
91 nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel), inst);
H A Dnvc0_graph.c621 nvc0_graph_isr_chid(struct drm_device *dev, u64 inst) argument
634 if (inst == chan->ramin->vinst)
660 u64 inst = (u64)(nv_rd32(dev, 0x409b00) & 0x0fffffff) << 12; local
661 u32 chid = nvc0_graph_isr_chid(dev, inst);
675 chid, inst, subc, class, mthd, data);
684 chid, inst, subc, class, mthd, data);
694 chid, inst, subc, class, mthd, data);
H A Dnvc0_fifo.c418 u32 inst = nv_rd32(dev, 0x2800 + (unit * 0x10)); local
436 printk(" on channel 0x%010llx\n", (u64)inst << 12);
H A Dnv10_graph.c660 uint32_t inst)
682 if (subchan < 0 || !inst)
709 nv_wr32(dev, NV10_PGRAPH_FFINTFC_ST2_DL, inst);
659 nv10_graph_load_dma_vtxbuf(struct nouveau_channel *chan, uint32_t inst) argument
/drivers/scsi/
H A Datari_scsi.h56 #define NCR5380_dma_read_setup(inst,d,c) atari_scsi_dma_setup (inst, d, c, 0)
57 #define NCR5380_dma_write_setup(inst,d,c) atari_scsi_dma_setup (inst, d, c, 1)
58 #define NCR5380_dma_residual(inst) atari_scsi_dma_residual( inst )
/drivers/edac/
H A Damd8131_edac.c71 .inst = NORTH_A,
76 .inst = NORTH_B,
81 .inst = SOUTH_A,
86 .inst = SOUTH_B,
90 {.inst = NO_BRIDGE,},
253 for (dev_info = amd8131_chipset.devices; dev_info->inst != NO_BRIDGE;
258 if (dev_info->inst == NO_BRIDGE) /* should never happen */
317 for (dev_info = amd8131_chipset.devices; dev_info->inst != NO_BRIDGE;
322 if (dev_info->inst == NO_BRIDGE) /* should never happen */
H A Dedac_device.c76 struct edac_device_instance *dev_inst, *inst; local
169 inst = &dev_inst[instance];
170 inst->ctl = dev_ctl;
171 inst->nr_blocks = nr_blocks;
173 inst->blocks = blk_p;
176 snprintf(inst->name, sizeof(inst->name),
182 blk->instance = inst;
188 __func__, instance, inst, block,
H A Damd8131_edac.h93 enum pcix_bridge_inst inst; member in struct:amd8131_dev_info
/drivers/target/iscsi/
H A Discsi_target_stat.c77 ISCSI_STAT_INSTANCE_ATTR_RO(inst); variable
247 ISCSI_STAT_SESS_ERR_ATTR_RO(inst); variable
329 ISCSI_STAT_TGT_ATTR_RO(inst); variable
494 ISCSI_STAT_LOGIN_RO(inst); variable
651 ISCSI_STAT_LOGOUT_RO(inst); variable
733 ISCSI_STAT_SESS_RO(inst); variable
/drivers/scsi/arm/
H A Dfas216.c156 unsigned char is, stat, inst; local
160 inst = fas216_readb(info, REG_INST);
166 fas216_readb(info, REG_CMD), stat, inst, is,
1627 unsigned char inst, is, stat; local
1634 inst = fas216_readb(info, REG_INST);
1636 add_debug_list(stat, is, inst, info->scsi.phase);
1639 if (inst & INST_BUSRESET) {
1643 } else if (inst & INST_ILLEGALCMD) {
1647 } else if (inst & INST_DISCONNECT)
1649 else if (inst
[all...]
/drivers/tty/serial/
H A Dsunzilog.c1406 int inst; local
1417 inst = uart_chip_count + kbm_inst;
1419 inst = uart_inst;
1421 sunzilog_chip_regs[inst] = of_ioremap(&op->resource[0], 0,
1424 if (!sunzilog_chip_regs[inst])
1427 rp = sunzilog_chip_regs[inst];
1432 up = &sunzilog_port_table[inst * 2];
1444 up[0].port.line = (inst * 2) + 0;
1461 up[1].port.line = (inst * 2) + 1;
H A Dsunsab.c1012 static int inst; local
1016 up = &sunsab_ports[inst * 2];
1020 (inst * 2) + 0);
1026 (inst * 2) + 1);
1048 inst++;
H A Dsunsu.c1411 static int inst; local
1421 if (inst >= UART_NR)
1423 up = &sunsu_ports[inst];
1430 up->port.line = inst;
1491 inst++;
/drivers/target/
H A Dtarget_core_stat.c94 DEV_STAT_SCSI_DEV_ATTR_RO(inst); variable
190 DEV_STAT_SCSI_TGT_DEV_ATTR_RO(inst); variable
349 DEV_STAT_SCSI_LU_ATTR_RO(inst); variable
721 DEV_STAT_SCSI_PORT_ATTR_RO(inst); variable
864 DEV_STAT_SCSI_TGT_PORT_ATTR_RO(inst); variable
1101 DEV_STAT_SCSI_TRANSPORT_ATTR_RO(inst); variable
1260 DEV_STAT_SCSI_AUTH_INTR_ATTR_RO(inst); variable
1626 DEV_STAT_SCSI_ATTR_INTR_PORT_ATTR_RO(inst); variable
/drivers/net/ethernet/sun/
H A Dcassini.c1174 cas_hp_inst_t *inst; local
1179 while ((inst = firmware) && inst->note) {
1182 val = CAS_BASE(HP_INSTR_RAM_HI_VAL, inst->val);
1183 val |= CAS_BASE(HP_INSTR_RAM_HI_MASK, inst->mask);
1186 val = CAS_BASE(HP_INSTR_RAM_MID_OUTARG, inst->outarg >> 10);
1187 val |= CAS_BASE(HP_INSTR_RAM_MID_OUTOP, inst->outop);
1188 val |= CAS_BASE(HP_INSTR_RAM_MID_FNEXT, inst->fnext);
1189 val |= CAS_BASE(HP_INSTR_RAM_MID_FOFF, inst->foff);
1190 val |= CAS_BASE(HP_INSTR_RAM_MID_SNEXT, inst
[all...]
/drivers/media/video/saa7164/
H A Dsaa7164.h223 u32 inst; member in struct:saa7164_fw_status

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