Searched refs:iobase (Results 1 - 25 of 249) sorted by relevance

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/drivers/staging/comedi/drivers/addi-data/
H A Dhwdrv_apci1500.c153 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
157 outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
280 devpriv->iobase +
286 devpriv->iobase +
292 devpriv->iobase +
295 devpriv->iobase +
303 devpriv->iobase +
306 devpriv->iobase +
313 devpriv->iobase +
316 devpriv->iobase
[all...]
H A Dhwdrv_apci035.c127 /* ui_Command = inl(devpriv->iobase+((i_WatchdogNbr-1)*32)+12); */
130 outl(ui_Command, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12);
132 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12);
136 outl(data[3], devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 4);
140 outl(data[2], devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 8);
176 outl(ui_Command, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12);
178 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12);
189 outl(ui_Command, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12);
191 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12);
202 outl(ui_Command, devpriv->iobase
[all...]
H A Dhwdrv_apci1032.c103 devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE1);
105 devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE2);
107 outl(0x4, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
109 inl(devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
112 outl(0x6, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
119 devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE1);
121 devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_MODE2);
122 outl(0x0, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ);
154 ui_TmpValue = (unsigned int) inl(devpriv->iobase + APCI1032_DIGITAL_IP);
197 *data = (unsigned int) inl(devpriv->iobase
[all...]
H A Dhwdrv_apci3501.c83 *data = inl(devpriv->iobase + APCI3501_DIGITAL_IP);
170 ui_Temp = inl(devpriv->iobase + APCI3501_DIGITAL_OP);
178 outl(data[0], devpriv->iobase + APCI3501_DIGITAL_OP);
184 devpriv->iobase + APCI3501_DIGITAL_OP);
203 devpriv->iobase + APCI3501_DIGITAL_OP);
216 devpriv->iobase +
259 *data = inl(devpriv->iobase + APCI3501_DIGITAL_OP);
305 devpriv->iobase + APCI3501_ANALOG_OUTPUT +
365 ul_DAC_Ready = inl(devpriv->iobase + APCI3501_ANALOG_OUTPUT);
368 ul_DAC_Ready = inl(devpriv->iobase
[all...]
H A Dhwdrv_apci2032.c112 outl(ul_Command, devpriv->iobase + APCI2032_DIGITAL_OP_INTERRUPT);
113 ui_InterruptData = inl(devpriv->iobase + APCI2032_DIGITAL_OP_INTERRUPT);
143 ui_Temp = inl(devpriv->iobase + APCI2032_DIGITAL_OP);
152 outl(data[0], devpriv->iobase + APCI2032_DIGITAL_OP);
192 devpriv->iobase + APCI2032_DIGITAL_OP);
211 devpriv->iobase + APCI2032_DIGITAL_OP);
280 devpriv->iobase +
323 *data = inl(devpriv->iobase + APCI2032_DIGITAL_OP_RW);
389 devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG +
393 devpriv->iobase
[all...]
/drivers/net/irda/
H A Dw83977af_ir.c34 * bank = inb( iobase+BSR);
38 * outb( bank, iobase+BSR);
90 static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
93 static int w83977af_probe(int iobase, int irq, int dma);
98 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
99 static void w83977af_dma_write(struct w83977af_ir *self, int iobase);
152 * Function w83977af_open (iobase, irq)
157 static int w83977af_open(int i, unsigned int iobase, unsigned int irq, argument
167 if (!request_region(iobase, CHIP_IO_EXTENT, driver_name)) {
168 IRDA_DEBUG(0, "%s(), can't get iobase o
276 int iobase; local
315 w83977af_probe(int iobase, int irq, int dma) argument
417 int iobase; local
499 int iobase; local
566 w83977af_dma_write(struct w83977af_ir *self, int iobase) argument
620 w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size) argument
664 int iobase; local
715 int iobase; local
790 int iobase; local
909 int iobase; local
936 int iobase; local
1005 int iobase; local
1085 int iobase; local
1122 int iobase; local
1153 int iobase; local
1217 int iobase; local
[all...]
H A Dvia-ircc.c84 int iobase);
93 static int via_ircc_read_dongle_id(int iobase);
99 static void via_ircc_change_dongle_speed(int iobase, int speed,
101 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
103 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
104 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
284 * Function via_ircc_open(pdev, iobase, irq)
323 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
430 int iobase; local
434 iobase
466 int iobase = self->io.fir_base; local
519 via_ircc_read_dongle_id(int iobase) argument
532 via_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) argument
679 u16 iobase; local
780 u16 iobase; local
851 u16 iobase; local
896 via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase) argument
936 int iobase; local
1005 int iobase; local
1047 via_ircc_dma_receive_complete(struct via_ircc_cb *self, int iobase) argument
1168 upload_rxdata(struct via_ircc_cb *self, int iobase) argument
1218 RxTimerHandler(struct via_ircc_cb *self, int iobase) argument
1310 int iobase; local
1413 int iobase; local
1453 int iobase; local
1476 int iobase; local
1544 int iobase; local
[all...]
H A Dvia-ircc.h286 static void SetMaxRxPacketSize(__u16 iobase, __u16 size) argument
292 WriteReg(iobase, I_CF_L_2, low);
293 WriteReg(iobase, I_CF_H_2, high);
301 static void SetFIFO(__u16 iobase, __u16 value) argument
305 WriteRegBit(iobase, 0x11, 0, 0);
306 WriteRegBit(iobase, 0x11, 7, 1);
309 WriteRegBit(iobase, 0x11, 0, 0);
310 WriteRegBit(iobase, 0x11, 7, 0);
313 WriteRegBit(iobase, 0x11, 0, 1);
314 WriteRegBit(iobase,
412 SetTimer(__u16 iobase, __u8 count) argument
420 SetSendByte(__u16 iobase, __u32 count) argument
432 ResetChip(__u16 iobase, __u8 type) argument
440 CkRxRecv(__u16 iobase, struct via_ircc_cb *self) argument
461 RxCurCount(__u16 iobase, struct via_ircc_cb * self) argument
477 GetRecvByte(__u16 iobase, struct via_ircc_cb * self) argument
534 ActClk(__u16 iobase, __u8 value) argument
544 ClkTx(__u16 iobase, __u8 Clk, __u8 Tx) argument
566 Wr_Byte(__u16 iobase, __u8 data) argument
592 Rd_Indx(__u16 iobase, __u8 addr, __u8 index) argument
656 Wr_Indx(__u16 iobase, __u8 addr, __u8 index, __u8 data) argument
677 ResetDongle(__u16 iobase) argument
691 SetSITmode(__u16 iobase) argument
703 SI_SetMode(__u16 iobase, int mode) argument
718 InitCard(__u16 iobase) argument
726 CommonInit(__u16 iobase) argument
751 SetBaudRate(__u16 iobase, __u32 rate) argument
788 SetPulseWidth(__u16 iobase, __u8 width) argument
802 SetSendPreambleCount(__u16 iobase, __u8 count) argument
[all...]
H A Dnsc-ircc.c33 * bank = inb(iobase+BSR);
37 * outb(bank, iobase+BSR);
176 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
181 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
182 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
185 static int nsc_ircc_read_dongle_id (int iobase);
186 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
352 * Function nsc_ircc_open (iobase, irq)
411 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
519 int iobase; local
987 int iobase = info->fir_base; local
1044 nsc_ircc_read_dongle_id(int iobase) argument
1083 nsc_ircc_init_dongle_interface(int iobase, int dongle_id) argument
1168 nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) argument
1257 int iobase; local
1366 int iobase; local
1439 int iobase; local
1571 nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase) argument
1609 nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size) argument
1652 int iobase; local
1717 int iobase; local
1767 nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase) argument
1930 int iobase; local
2013 nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase, int eir) argument
2099 int iobase; local
2140 int iobase; local
2175 int iobase; local
2238 int iobase; local
2329 int iobase = self->io.fir_base; local
[all...]
H A Dali-ircc.c120 static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
138 static void SIR2FIR(int iobase);
139 static void FIR2SIR(int iobase);
331 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __func__,
424 int iobase; local
430 iobase = self->io.fir_base;
561 int iobase = info->fir_base; local
571 SIR2FIR(iobase);
574 outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM
577 switch_bank(iobase, BANK
704 int iobase, tmp; local
825 int iobase; local
879 int iobase; local
914 int iobase; local
970 int iobase; local
1019 int iobase; local
1057 int iobase; local
1125 int iobase,dongle_id; local
1308 ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) argument
1341 int iobase; local
1446 int iobase; local
1590 int iobase, tmp; local
1660 int iobase; local
1732 int iobase, tmp; local
1793 int len, i, iobase, val; local
1969 int iobase; local
2095 int iobase; local
2167 int iobase = self->io.fir_base; /* or sir_base */ local
2213 SIR2FIR(int iobase) argument
2236 FIR2SIR(int iobase) argument
[all...]
/drivers/net/ethernet/dec/
H A Dewrk3.h18 #define EWRK3_CSR iobase+0x00 /* Control and Status Register */
19 #define EWRK3_CR iobase+0x01 /* Control Register */
20 #define EWRK3_ICR iobase+0x02 /* Interrupt Control Register */
21 #define EWRK3_TSR iobase+0x03 /* Transmit Status Register */
22 #define EWRK3_RSVD1 iobase+0x04 /* RESERVED */
23 #define EWRK3_RSVD2 iobase+0x05 /* RESERVED */
24 #define EWRK3_FMQ iobase+0x06 /* Free Memory Queue */
25 #define EWRK3_FMQC iobase+0x07 /* Free Memory Queue Counter */
26 #define EWRK3_RQ iobase+0x08 /* Receive Queue */
27 #define EWRK3_RQC iobase
[all...]
/drivers/staging/comedi/drivers/
H A Ddas6402.c142 outb_p(p, dev->iobase + 15);
145 outb_p(p, dev->iobase + 12);
147 outb_p(p, dev->iobase + 12);
151 outb_p(p, dev->iobase + 15);
154 outb_p(p, dev->iobase + 13);
156 outb_p(p, dev->iobase + 13);
160 outb_p(p, dev->iobase + 15);
163 outb_p(p, dev->iobase + 14);
165 outb_p(p, dev->iobase + 14);
180 printk("das6402: iobase
317 unsigned long iobase; local
[all...]
H A Dpcl725.c55 outb(s->state, dev->iobase + PCL725_DO);
69 data[1] = inb(dev->iobase + PCL725_DI);
77 unsigned long iobase; local
79 iobase = it->options[0];
80 printk(KERN_INFO "comedi%d: pcl725: 0x%04lx ", dev->minor, iobase);
81 if (!request_region(iobase, PCL725_SIZE, "pcl725")) {
86 dev->iobase = iobase;
119 if (dev->iobase)
120 release_region(dev->iobase, PCL725_SIZ
[all...]
H A Dfl512.c87 unsigned long iobase = dev->iobase; local
92 outb(chan, iobase + 2); /* select chan */
93 outb(0, iobase + 3); /* start conversion */
96 lo_byte = inb(iobase + 2); /* low 8 byte */
97 hi_byte = inb(iobase + 3) & 0xf; /* high 4 bit and mask */
112 unsigned long iobase = dev->iobase; /* get base address */ local
116 outb(data[n] & 0x0ff, iobase + 4 + 2 * chan);
118 outb((data[n] & 0xf00) >> 8, iobase
148 unsigned long iobase; local
[all...]
H A Dpcl724.c111 unsigned long iobase = arg; local
114 outb(data, iobase + port);
117 return inb(iobase + port);
122 unsigned long iobase)
124 int movport = SIZE_8255 * (iobase >> 12);
126 iobase &= 0x0fff;
129 outb(port + movport, iobase);
130 outb(data, iobase + 1);
133 outb(port + movport, iobase);
134 return inb(iobase
121 subdev_8255mapped_cb(int dir, int port, int data, unsigned long iobase) argument
140 unsigned long iobase; local
[all...]
H A Dni_atmio16d.c221 outw(0xFFC2, dev->iobase + AM9513A_COM_REG);
222 outw(0xFF02, dev->iobase + AM9513A_COM_REG);
223 outw(0x4, dev->iobase + AM9513A_DATA_REG);
224 outw(0xFF0A, dev->iobase + AM9513A_COM_REG);
225 outw(0x3, dev->iobase + AM9513A_DATA_REG);
226 outw(0xFF42, dev->iobase + AM9513A_COM_REG);
227 outw(0xFF42, dev->iobase + AM9513A_COM_REG);
229 outw(0xFFC4, dev->iobase + AM9513A_COM_REG);
230 outw(0xFF03, dev->iobase + AM9513A_COM_REG);
231 outw(0x4, dev->iobase
749 unsigned long iobase; local
[all...]
H A Ddt2817.c107 outb(oe, dev->iobase + DT2817_CR);
129 outb(s->state & 0xff, dev->iobase + DT2817_DATA + 0);
132 dev->iobase + DT2817_DATA + 1);
135 dev->iobase + DT2817_DATA + 2);
138 dev->iobase + DT2817_DATA + 3);
140 data[1] = inb(dev->iobase + DT2817_DATA + 0);
141 data[1] |= (inb(dev->iobase + DT2817_DATA + 1) << 8);
142 data[1] |= (inb(dev->iobase + DT2817_DATA + 2) << 16);
143 data[1] |= (inb(dev->iobase + DT2817_DATA + 3) << 24);
152 unsigned long iobase; local
[all...]
H A Dpcmad.c118 outb(chan, dev->iobase + PCMAD_CONVERT);
121 if ((inb(dev->iobase + PCMAD_STATUS) & 0x3) == 0x3)
124 data[n] = inb(dev->iobase + PCMAD_LSB);
125 data[n] |= (inb(dev->iobase + PCMAD_MSB) << 8);
145 unsigned long iobase; local
147 iobase = it->options[0];
148 printk(KERN_INFO "comedi%d: pcmad: 0x%04lx ", dev->minor, iobase);
149 if (!request_region(iobase, PCMAD_SIZE, "pcmad")) {
154 dev->iobase = iobase;
[all...]
H A Dmultiq3.c124 dev->iobase + MULTIQ3_CONTROL);
127 if (inw(dev->iobase + MULTIQ3_STATUS) & MULTIQ3_STATUS_EOC)
134 outw(0, dev->iobase + MULTIQ3_AD_CS);
136 if (inw(dev->iobase +
143 hi = inb(dev->iobase + MULTIQ3_AD_CS);
144 lo = inb(dev->iobase + MULTIQ3_AD_CS);
173 dev->iobase + MULTIQ3_CONTROL);
174 outw(data[i], dev->iobase + MULTIQ3_DAC_DATA);
175 outw(MULTIQ3_CONTROL_MUST, dev->iobase + MULTIQ3_CONTROL);
190 data[1] = inw(dev->iobase
261 unsigned long iobase; local
[all...]
H A Drti802.c106 outb(chan, dev->iobase + RTI802_SELECT);
107 outb(d & 0xff, dev->iobase + RTI802_DATALOW);
108 outb(d >> 8, dev->iobase + RTI802_DATAHIGH);
117 unsigned long iobase; local
119 iobase = it->options[0];
120 printk(KERN_INFO "comedi%d: rti802: 0x%04lx ", dev->minor, iobase);
121 if (!request_region(iobase, RTI802_SIZE, "rti802")) {
125 dev->iobase = iobase;
159 if (dev->iobase)
[all...]
H A Drti800.c93 #define Am9513_output_control(a) outb(a, dev->iobase+RTI800_9513A_CNTRL)
94 #define Am9513_output_data(a) outb(a, dev->iobase+RTI800_9513A_DATA)
95 #define Am9513_input_data() inb(dev->iobase+RTI800_9513A_DATA)
96 #define Am9513_input_status() inb(dev->iobase+RTI800_9513A_STATUS)
219 inb(dev->iobase + RTI800_ADCHI);
220 outb(0, dev->iobase + RTI800_CLRFLAGS);
225 outb(devpriv->muxgain_bits, dev->iobase + RTI800_MUXGAIN);
235 outb(0, dev->iobase + RTI800_CONVERT);
237 status = inb(dev->iobase + RTI800_CSR);
240 outb(0, dev->iobase
344 unsigned long iobase; local
[all...]
H A Daio_aio12_8.c101 inb(dev->iobase + AIO12_8_STATUS);
107 outb(control, dev->iobase + AIO12_8_ADC);
111 !(inb(dev->iobase + AIO12_8_STATUS) & STATUS_ADC_EOC)) {
121 data[n] = inw(dev->iobase + AIO12_8_ADC) & 0x0FFF;
144 unsigned long port = dev->iobase + AIO12_8_DAC_0 + (2 * chan);
147 outb(0x01, dev->iobase + DAC_ENABLE);
170 int iobase; local
173 iobase = it->options[0];
174 if (!request_region(iobase, 24, "aio_aio12_8")) {
181 dev->iobase
[all...]
H A Ddt2815.c113 if (inb(dev->iobase + DT2815_STATUS) == status)
151 outb(lo, dev->iobase + DT2815_DATA);
193 unsigned long iobase; local
195 iobase = it->options[0];
196 printk(KERN_INFO "comedi%d: dt2815: 0x%04lx ", dev->minor, iobase);
197 if (!request_region(iobase, DT2815_SIZE, "dt2815")) {
202 dev->iobase = iobase;
230 outb(0x00, dev->iobase + DT2815_STATUS);
236 status = inb(dev->iobase
[all...]
H A Dpcl711.c213 hi = inb(dev->iobase + PCL711_AD_HI);
214 lo = inb(dev->iobase + PCL711_AD_LO);
215 outb(0, dev->iobase + PCL711_CLRINTR);
222 outb(1, dev->iobase + PCL711_MODE);
224 outb(0, dev->iobase + PCL711_MODE);
236 outb(CR_RANGE(chan), dev->iobase + PCL711_GAIN);
255 outb(chan_register, dev->iobase + PCL711_MUX);
272 outb(1, dev->iobase + PCL711_MODE);
275 outb(0, dev->iobase + PCL711_SOFTTRIG);
279 hi = inb(dev->iobase
534 unsigned long iobase; local
[all...]
H A Dpoc.c121 unsigned long iobase; local
124 iobase = it->options[0];
125 printk(KERN_INFO "comedi%d: poc: using %s iobase 0x%lx\n", dev->minor,
126 this_board->name, iobase);
130 if (iobase == 0) {
137 if (!request_region(iobase, iosize, "dac02")) {
139 "0x%lx to 0x%lx\n", iobase, iobase + iosize - 1);
142 dev->iobase = iobase;
[all...]

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