Searched refs:s32 (Results 1 - 25 of 536) sorted by relevance

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/drivers/macintosh/
H A Dwindfarm_pid.h30 s32 gd, gp, gr; /* PID gains */
31 s32 itarget; /* PID input target */
32 s32 min,max; /* min and max target values */
38 s32 target; /* current target value */
39 s32 samples[WF_PID_MAX_HISTORY]; /* samples history buffer */
40 s32 errors[WF_PID_MAX_HISTORY]; /* error history buffer */
46 extern s32 wf_pid_run(struct wf_pid_state *st, s32 sample);
63 s32 gd, gp, gr; /* PID gains */
64 s32 pmaxad
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H A Dtherm_pm72.h152 s32 G_d;
153 s32 G_p;
154 s32 G_r;
155 s32 input_target;
156 s32 output_min;
157 s32 output_max;
158 s32 interval;
166 s32 sample_history[BACKSIDE_PID_HISTORY_SIZE];
167 s32 error_history[BACKSIDE_PID_HISTORY_SIZE];
169 s32 last_tem
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/drivers/staging/comedi/drivers/
H A Djr3_pci.h15 static inline s16 get_s16(volatile const s32 * p)
20 static inline void set_s16(volatile s32 * p, s16 val)
46 s32 raw_data;
47 s32 reserved[2];
54 s32 fx;
55 s32 fy;
56 s32 fz;
57 s32 mx;
58 s32 my;
59 s32 m
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/drivers/net/wireless/bcmdhd/
H A Ddhd_cfg80211.h34 s32 dhd_cfg80211_init(struct wl_priv *wl);
35 s32 dhd_cfg80211_deinit(struct wl_priv *wl);
36 s32 dhd_cfg80211_down(struct wl_priv *wl);
37 s32 dhd_cfg80211_set_p2p_info(struct wl_priv *wl, int val);
38 s32 dhd_cfg80211_clean_p2p_info(struct wl_priv *wl);
39 s32 dhd_config_dongle(struct wl_priv *wl, bool need_lock);
H A Dwldev_common.h35 s32 wldev_ioctl(
41 s32 wldev_iovar_getbuf(
43 void *param, s32 paramlen, void *buf, s32 buflen, struct mutex* buf_sync);
48 s32 wldev_iovar_setbuf(
50 void *param, s32 paramlen, void *buf, s32 buflen, struct mutex* buf_sync);
52 s32 wldev_iovar_setint(
53 struct net_device *dev, s8 *iovar, s32 val);
55 s32 wldev_iovar_getin
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H A Dwldev_common.c50 s32 wldev_ioctl(
53 s32 ret = 0;
72 static s32 wldev_mkiovar(
73 s8 *iovar_name, s8 *param, s32 paramlen,
76 s32 iolen = 0;
82 s32 wldev_iovar_getbuf(
84 void *param, s32 paramlen, void *buf, s32 buflen, struct mutex* buf_sync)
86 s32 ret = 0;
98 s32 wldev_iovar_setbu
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H A Dwl_cfgp2p.h184 extern s32
188 extern s32
190 extern s32
193 extern s32
196 extern s32
198 extern s32
200 extern s32
203 extern s32
204 wl_cfgp2p_ifidx(struct wl_priv *wl, struct ether_addr *mac, s32 *index);
206 extern s32
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/drivers/staging/tidspbridge/include/dspbridge/
H A Dmsgdefs.h27 typedef void (*msg_onexit) (void *h, s32 node_status);
H A Ddblldefs.h42 typedef s32 dbll_flags;
77 typedef s32(*dbll_alloc_fxn) (void *hdl, s32 space, u32 size, u32 align,
78 u32 *dsp_address, s32 seg_id, s32 req,
84 typedef s32(*dbll_f_close_fxn) (void *);
91 typedef bool(*dbll_free_fxn) (void *hdl, u32 addr, s32 space, u32 size,
111 typedef s32(*dbll_read_fxn) (void *, size_t, size_t, void *);
116 typedef s32(*dbll_seek_fxn) (void *, long, int);
138 typedef s32(*dbll_tell_fx
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H A Duuidutil.h42 s32 size);
/drivers/net/ethernet/intel/igb/
H A De1000_nvm.h31 s32 igb_acquire_nvm(struct e1000_hw *hw);
33 s32 igb_read_mac_addr(struct e1000_hw *hw);
34 s32 igb_read_part_num(struct e1000_hw *hw, u32 *part_num);
35 s32 igb_read_part_string(struct e1000_hw *hw, u8 *part_num,
37 s32 igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
38 s32 igb_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
39 s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
40 s32 igb_validate_nvm_checksum(struct e1000_hw *hw);
41 s32 igb_update_nvm_checksum(struct e1000_hw *hw);
H A De1000_mac.h41 s32 igb_blink_led(struct e1000_hw *hw);
42 s32 igb_check_for_copper_link(struct e1000_hw *hw);
43 s32 igb_cleanup_led(struct e1000_hw *hw);
44 s32 igb_config_fc_after_link_up(struct e1000_hw *hw);
45 s32 igb_disable_pcie_master(struct e1000_hw *hw);
46 s32 igb_force_mac_fc(struct e1000_hw *hw);
47 s32 igb_get_auto_rd_done(struct e1000_hw *hw);
48 s32 igb_get_bus_info_pcie(struct e1000_hw *hw);
49 s32 igb_get_hw_semaphore(struct e1000_hw *hw);
50 s32 igb_get_speed_and_duplex_coppe
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H A De1000_phy.h44 s32 igb_check_downshift(struct e1000_hw *hw);
45 s32 igb_check_reset_block(struct e1000_hw *hw);
46 s32 igb_copper_link_setup_igp(struct e1000_hw *hw);
47 s32 igb_copper_link_setup_m88(struct e1000_hw *hw);
48 s32 igb_copper_link_setup_m88_gen2(struct e1000_hw *hw);
49 s32 igb_phy_force_speed_duplex_igp(struct e1000_hw *hw);
50 s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw);
51 s32 igb_get_cable_length_m88(struct e1000_hw *hw);
52 s32 igb_get_cable_length_m88_gen2(struct e1000_hw *hw);
53 s32 igb_get_cable_length_igp_
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H A De1000_mbx.h70 s32 igb_read_mbx(struct e1000_hw *, u32 *, u16, u16);
71 s32 igb_write_mbx(struct e1000_hw *, u32 *, u16, u16);
72 s32 igb_check_for_msg(struct e1000_hw *, u16);
73 s32 igb_check_for_ack(struct e1000_hw *, u16);
74 s32 igb_check_for_rst(struct e1000_hw *, u16);
75 s32 igb_init_mbx_params_pf(struct e1000_hw *);
/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_common.h35 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
36 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
37 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
38 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
39 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
40 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
42 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
43 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
45 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
47 s32 ixgbe_led_on_generi
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H A Dixgbe_phy.h91 s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
92 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
93 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
94 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
96 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
98 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
99 s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
103 s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
108 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
111 s32 ixgbe_setup_phy_link_tn
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H A Dixgbe_mbx.c43 s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
46 s32 ret_val = IXGBE_ERR_MBX;
67 s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
70 s32 ret_val = 0;
88 s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
91 s32 ret_val = IXGBE_ERR_MBX;
106 s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
109 s32 ret_val = IXGBE_ERR_MBX;
124 s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)
127 s32 ret_va
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/drivers/net/ethernet/oki-semi/pch_gbe/
H A Dpch_gbe_api.h25 s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw);
27 s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw);
28 s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 *data);
29 s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 data);
32 s32 pch_gbe_hal_read_mac_addr(struct pch_gbe_hw *hw);
H A Dpch_gbe_phy.h27 s32 pch_gbe_phy_get_id(struct pch_gbe_hw *hw);
28 s32 pch_gbe_phy_read_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 *data);
29 s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data);
/drivers/net/wireless/brcm80211/brcmsmac/phy/
H A Dphy_qmath.h26 s32 qm_add32(s32 op1, s32 op2);
32 s32 qm_shl32(s32 op, int shift);
38 s16 qm_norm32(s32 op);
40 void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N);
H A Dphy_qmath.c39 s32 result;
43 result = ((s32) (op1) * (s32) (op2));
53 s32 qm_add32(s32 op1, s32 op2)
55 s32 result;
73 s32 temp = (s32) op1 + (s32) op
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/drivers/net/ethernet/intel/ixgbevf/
H A Dvf.h47 s32 (*init_hw)(struct ixgbe_hw *);
48 s32 (*reset_hw)(struct ixgbe_hw *);
49 s32 (*start_hw)(struct ixgbe_hw *);
50 s32 (*clear_hw_cntrs)(struct ixgbe_hw *);
53 s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *);
54 s32 (*stop_adapter)(struct ixgbe_hw *);
55 s32 (*get_bus_info)(struct ixgbe_hw *);
58 s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool, bool);
59 s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool);
60 s32 (*get_link_capabilitie
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/drivers/staging/tidspbridge/gen/
H A Duuidutil.c37 s32 size)
39 s32 i; /* return result from snprintf. */
50 static s32 uuid_hex_to_bin(char *buf, s32 len)
52 s32 i;
53 s32 result = 0;
73 s32 j;
/drivers/net/ethernet/intel/igbvf/
H A Dvf.h177 s32 (*init_params)(struct e1000_hw *);
178 s32 (*check_for_link)(struct e1000_hw *);
180 s32 (*get_bus_info)(struct e1000_hw *);
181 s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
183 s32 (*reset_hw)(struct e1000_hw *);
184 s32 (*init_hw)(struct e1000_hw *);
185 s32 (*setup_link)(struct e1000_hw *);
189 s32 (*read_mac_addr)(struct e1000_hw *);
190 s32 (*set_vfta)(struct e1000_hw *, u16, bool);
207 s32 (*init_param
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/drivers/media/video/cx88/
H A Dcx88-dsp.c31 #define INT_PI ((s32)(3.141592653589 * 32768.0))
34 ((float)(((s32)((a)*100))%((s32)((b)*100)))/100.0)
36 #define baseband_freq(carrier, srate, tone) ((s32)( \
52 #define FREQ_A2M_CARRIER ((s32)(2.114516 * 32768.0))
53 #define FREQ_A2M_DUAL ((s32)(2.754916 * 32768.0))
54 #define FREQ_A2M_STEREO ((s32)(2.462326 * 32768.0))
56 #define FREQ_EIAJ_CARRIER ((s32)(1.963495 * 32768.0)) /* 5pi/8 */
57 #define FREQ_EIAJ_DUAL ((s32)(2.562118 * 32768.0))
58 #define FREQ_EIAJ_STEREO ((s32)(2.60105
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