/drivers/gpu/drm/radeon/ |
H A D | radeon_ioc32.c | 111 drm_radeon_clear_t __user *clr; local 116 clr = compat_alloc_user_space(sizeof(*clr)); 117 if (!access_ok(VERIFY_WRITE, clr, sizeof(*clr)) 118 || __put_user(clr32.flags, &clr->flags) 119 || __put_user(clr32.clear_color, &clr->clear_color) 120 || __put_user(clr32.clear_depth, &clr->clear_depth) 121 || __put_user(clr32.color_mask, &clr->color_mask) 122 || __put_user(clr32.depth_mask, &clr [all...] |
/drivers/gpio/ |
H A D | gpio-generic.c | 289 * - set/clear pair (named "set" and "clr"). 294 * by clearing a bit. For the set clr pair, this drives a 1 by setting a bit 309 void __iomem *clr) 316 if (set && clr) { 318 bgc->reg_clr = clr; 320 } else if (set && !clr) { 366 void __iomem *clr, void __iomem *dirout, void __iomem *dirin, 384 ret = bgpio_setup_io(bgc, dat, set, clr); 448 void __iomem *clr; local 471 clr 306 bgpio_setup_io(struct bgpio_chip *bgc, void __iomem *dat, void __iomem *set, void __iomem *clr) argument 364 bgpio_init(struct bgpio_chip *bgc, struct device *dev, unsigned long sz, void __iomem *dat, void __iomem *set, void __iomem *clr, void __iomem *dirout, void __iomem *dirin, bool big_endian) argument [all...] |
/drivers/scsi/aic7xxx_old/ |
H A D | aic7xxx.seq | 60 clr SCSISIGO; /* De-assert BSY */ 67 clr CCSGCTL; 68 clr CCSCBCTL; 318 clr DFCNTRL; 328 clr SCSIRATE; 333 clr SEQ_FLAGS ret; 486 clr HCNT[1]; 487 clr HCNT[2]; 506 clr A; /* add sizeof(struct scatter) */ 528 clr SG_COUN [all...] |
/drivers/net/cris/ |
H A D | eth_v10.c | 471 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) | 472 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) | 473 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr); 477 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) | 478 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) | 479 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) | 480 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr); 556 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr); 1202 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr); 1216 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr); [all...] |
/drivers/i2c/busses/ |
H A D | i2c-xiic.c | 333 u32 clr = 0; local 379 clr = XIIC_INTR_RX_FULL_MASK; 393 clr |= (isr & XIIC_INTR_TX_ERROR_MASK); 414 clr = XIIC_INTR_BNB_MASK; 431 clr = pend & 467 clr = pend; 470 dev_dbg(i2c->adap.dev.parent, "%s clr: 0x%x\n", __func__, clr); 472 xiic_setreg32(i2c, XIIC_IISR_OFFSET, clr);
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H A D | i2c-sh_mobile.c | 184 unsigned char set, unsigned char clr) 186 iic_wr(pd, offs, (iic_rd(pd, offs) | set) & ~clr); 183 iic_set_clr(struct sh_mobile_i2c_data *pd, int offs, unsigned char set, unsigned char clr) argument
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/drivers/scsi/aic7xxx/ |
H A D | aic79xx.seq | 155 clr SCB_SCSI_STATUS; 287 clr INT_COALESCING_CMDCOUNT; 295 clr A; 313 clr SCB_FIFO_USE_COUNT; 524 clr SEQINTCTL ret; 729 clr SEQINTCTL; 1084 clr SCBPTR[1]; \ 1128 clr SCBPTR[1]; 1152 clr SEQ_FLAGS; /* make note of IDENTIFY */ 1225 clr [all...] |
H A D | aic7xxx.seq | 79 clr SCSIBUSL; 531 clr SCSIBUSL; 533 clr SCSISIGO; 629 clr CCSCBCTL; 679 clr SCSIBUSL; /* Prevent bit leakage durint SELTO */ 694 clr DFCNTRL; 705 clr SCSIRATE; 715 clr A; /* add sizeof(struct scatter) */ 726 clr CCSGCTL; 1089 clr HADD [all...] |
/drivers/video/ |
H A D | hpfb.c | 152 u8 clr; local 154 clr = region->color & 0xff; 160 out_8(fb_regs + TC_WEN, fb_bitmask & clr); 164 out_8(fb_regs + TC_WEN, fb_bitmask & ~clr);
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/drivers/usb/serial/ |
H A D | ark3116.c | 515 unsigned set, unsigned clr) 534 if (clr & TIOCM_RTS) 536 if (clr & TIOCM_DTR) 538 if (clr & TIOCM_OUT1) 540 if (clr & TIOCM_OUT2) 514 ark3116_tiocmset(struct tty_struct *tty, unsigned set, unsigned clr) argument
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/drivers/net/wireless/ath/ath9k/ |
H A D | eeprom_4k.c | 1050 u32 pwrctrl, mask, clr; local 1054 clr = mask * 0x1f; 1055 REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr); 1056 REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr); 1057 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr); 1061 clr = mask * 0x1f; 1062 REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr); 1066 clr = mask * 0x1f; 1067 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr); 1068 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr); [all...] |
H A D | init.c | 202 u32 set, u32 clr) 207 val &= ~clr; 214 static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) argument 224 val = __ath9k_reg_rmw(sc, reg_offset, set, clr); 227 val = __ath9k_reg_rmw(sc, reg_offset, set, clr); 201 __ath9k_reg_rmw(struct ath_softc *sc, u32 reg_offset, u32 set, u32 clr) argument
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H A D | htc_drv_init.c | 443 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) argument 448 val &= ~clr;
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/drivers/usb/otg/ |
H A D | isp1301_omap.c | 548 u8 set = OTG1_DM_PULLDOWN, clr = OTG1_DM_PULLUP; local 569 clr |= OTG1_DP_PULLDOWN; 580 clr |= OTG1_DP_PULLUP; 586 else clr |= ISP; \ 608 clr |= OTG1_VBUS_DRV; 626 isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, clr); 634 if (clr & OTG1_DP_PULLUP) 640 if (clr & OTG1_DP_PULLUP)
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/drivers/tty/serial/ |
H A D | sb1250-duart.c | 264 unsigned int clr = 0, set = 0, mode2; local 269 clr |= M_DUART_CLR_OPR2; 273 clr |= M_DUART_CLR_OPR0; 274 clr <<= (uport->line) % 2; 284 write_sbdshr(sport, R_DUART_CLEAR_OPR, clr);
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/drivers/spi/ |
H A D | spi-sh-msiof.c | 97 u32 clr, u32 set) 99 u32 mask = clr | set; 104 data &= ~clr; 96 sh_msiof_modify_ctr_wait(struct sh_msiof_spi_priv *p, u32 clr, u32 set) argument
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H A D | spi-topcliff-pch.c | 252 u32 set, u32 clr) 255 tmp = (tmp & ~clr) | set; 251 pch_spi_setclr_reg(struct spi_master *master, int idx, u32 set, u32 clr) argument
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/drivers/staging/iio/dac/ |
H A D | ad5360.c | 260 unsigned int clr) 268 st->ctrl &= ~clr; 259 ad5360_update_ctrl(struct iio_dev *indio_dev, unsigned int set, unsigned int clr) argument
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H A D | ad5421.c | 161 unsigned int clr) 168 st->ctrl &= ~clr; 160 ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set, unsigned int clr) argument
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/drivers/net/wireless/ath/ |
H A D | ath.h | 120 u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr);
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/drivers/net/ethernet/qlogic/qlcnic/ |
H A D | qlcnic_ethtool.c | 1135 if (fw_dump->clr) 1153 if (!fw_dump->clr) { 1172 fw_dump->clr = 0; 1190 if (fw_dump->clr) {
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H A D | qlcnic_hw.c | 1714 if (fw_dump->clr) { 1776 fw_dump->clr = 1;
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/drivers/leds/ |
H A D | leds-bd2802.c | 531 #define BD2802_CONTROL_RGBS(name, id, clr) \ 538 led->color = clr; \ 553 led->color = clr; \
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/drivers/misc/ |
H A D | hpilo.c | 397 static inline void clear_pending_db(struct ilo_hwinfo *hw, int clr) argument 399 iowrite32(clr, &hw->mmio_vaddr[DB_OUT]);
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/drivers/video/matrox/ |
H A D | matroxfb_base.c | 627 #define SETCLR(clr)\ 628 var->clr.offset = rgbt->clr.offset;\ 629 var->clr.length = rgbt->clr.length
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