/arch/mn10300/boot/compressed/ |
H A D | misc.h | 12 extern int end;
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/arch/mn10300/mm/ |
H A D | cache-disabled.c | 16 asmlinkage long sys_cacheflush(unsigned long start, unsigned long end) argument 18 if (end < start)
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H A D | cache-inv-icache.c | 22 * @end: The ending virtual address of the page part. 28 static void flush_icache_page_range(unsigned long start, unsigned long end) argument 39 size = end - start; 72 smp_cache_call(SMP_ICACHE_INV_RANGE, start, end); 78 * @end: The ending virtual address of the region. 84 void flush_icache_range(unsigned long start, unsigned long end) argument 91 if (end > 0x80000000UL) { 93 if (end > 0xa0000000UL) { 94 end = 0xa0000000UL; 95 if (start >= end) [all...] |
/arch/blackfin/include/asm/ |
H A D | cacheflush.h | 28 #define flush_cache_range(vma, start, end) do { } while (0) 30 #define flush_cache_vmap(start, end) do { } while (0) 31 #define flush_cache_vunmap(start, end) do { } while (0) 34 #define flush_icache_range_others(start, end) \ 35 smp_icache_flush_range_others((start), (end)) 37 #define flush_icache_range_others(start, end) do { } while (0) 40 static inline void flush_icache_range(unsigned start, unsigned end) argument 43 if (end <= physical_mem_end) 44 blackfin_dcache_flush_range(start, end); 47 if (start >= L2_START && end < [all...] |
/arch/powerpc/boot/ |
H A D | stdlib.h | 4 unsigned long long int strtoull(const char *ptr, char **end, int base);
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/arch/sparc/include/asm/ |
H A D | tlbflush_64.h | 17 extern void flush_tsb_kernel_range(unsigned long start, unsigned long end); 24 #define flush_tlb_range(vma,start,end) \ 32 extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end); 36 #define flush_tlb_kernel_range(start,end) \ 37 do { flush_tsb_kernel_range(start,end); \ 38 __flush_tlb_kernel_range(start,end); \ 43 extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end); 45 #define flush_tlb_kernel_range(start, end) \ 46 do { flush_tsb_kernel_range(start,end); \ 47 smp_flush_tlb_kernel_range(start, end); \ [all...] |
/arch/mips/powertv/asic/ |
H A D | prealloc.h | 31 .end = (END), \ 44 #define PREALLOC_NORMAL(name, start, end, flags) \ 45 PREALLOC(name, start, end, flags) 47 #define PREALLOC_NORMAL(name, start, end, flags) 51 #define PREALLOC_TFTP(name, start, end, flags) \ 52 PREALLOC(name, start, end, flags) 54 #define PREALLOC_TFTP(name, start, end, flags) 58 #define PREALLOC_DOCSIS(name, start, end, flags) \ 59 PREALLOC(name, start, end, flags) 61 #define PREALLOC_DOCSIS(name, start, end, flag [all...] |
H A D | prealloc-gaia.c | 38 .end = 0x241FFFFF, /* 2MiB */ 44 .end = 0x24201FFF, 50 .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ 61 .end = 0x601FFFFF, /* 2MiB */ 67 .end = 0x60201FFF, 73 .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ 92 .end = 0x000FFFFF, 98 .end = 0x00009FFF, 104 .end = 0x00003FFF, 110 .end [all...] |
/arch/arm/mach-exynos/ |
H A D | dev-sysmmu.c | 45 .end = EXYNOS4_PA_SYSMMU_MDMA + SZ_64K - 1, 50 .end = IRQ_SYSMMU_MDMA0_0, 55 .end = EXYNOS4_PA_SYSMMU_SSS + SZ_64K - 1, 60 .end = IRQ_SYSMMU_SSS_0, 65 .end = EXYNOS4_PA_SYSMMU_FIMC0 + SZ_64K - 1, 70 .end = IRQ_SYSMMU_FIMC0_0, 75 .end = EXYNOS4_PA_SYSMMU_FIMC1 + SZ_64K - 1, 80 .end = IRQ_SYSMMU_FIMC1_0, 85 .end = EXYNOS4_PA_SYSMMU_FIMC2 + SZ_64K - 1, 90 .end [all...] |
/arch/powerpc/include/asm/ |
H A D | sparsemem.h | 19 extern int create_section_mapping(unsigned long start, unsigned long end); 20 extern int remove_section_mapping(unsigned long start, unsigned long end);
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/arch/sh/include/asm/ |
H A D | tlbflush.h | 10 * - flush_tlb_range(vma, start, end) flushes a range of pages 11 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 17 unsigned long end); 21 unsigned long end); 31 unsigned long end); 33 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 43 #define flush_tlb_range(vma, start, end) \ 44 local_flush_tlb_range(vma, start, end) 46 #define flush_tlb_kernel_range(start, end) \ 47 local_flush_tlb_kernel_range(start, end) [all...] |
/arch/x86/include/asm/ |
H A D | pat.h | 15 extern int reserve_memtype(u64 start, u64 end, 17 extern int free_memtype(u64 start, u64 end); 22 int io_reserve_memtype(resource_size_t start, resource_size_t end, 25 void io_free_memtype(resource_size_t start, resource_size_t end);
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/arch/c6x/include/asm/ |
H A D | cache.h | 59 extern void enable_caching(unsigned long start, unsigned long end); 60 extern void disable_caching(unsigned long start, unsigned long end); 73 extern void L1P_cache_block_invalidate(unsigned int start, unsigned int end); 74 extern void L1D_cache_block_invalidate(unsigned int start, unsigned int end); 76 unsigned int end); 77 extern void L1D_cache_block_writeback(unsigned int start, unsigned int end); 78 extern void L2_cache_block_invalidate(unsigned int start, unsigned int end); 79 extern void L2_cache_block_writeback(unsigned int start, unsigned int end); 81 unsigned int end); 83 unsigned int end); [all...] |
/arch/hexagon/include/asm/ |
H A D | tlbflush.h | 41 unsigned long start, unsigned long end); 42 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 56 #define flush_tlb_pgtables(mm, start, end)
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/arch/m68k/mm/ |
H A D | cache.c | 78 unsigned long start, end; local 80 end = endaddr & ICACHE_SET_MASK; 81 if (start > end) { 82 flush_cf_icache(0, end); 83 end = ICACHE_MAX_ADDR; 85 flush_cf_icache(start, end); 112 unsigned long start, end; local 114 end = (addr + len) & ICACHE_SET_MASK; 115 if (start > end) { 116 flush_cf_icache(0, end); [all...] |
/arch/s390/lib/ |
H A D | delay.c | 21 * To end the bloody studid and useless discussion about the 33 u64 clock_saved, end; local 35 end = get_clock() + (usecs << 12); 45 set_clock_comparator(end); 48 } while (get_clock() < end); 57 u64 clock_saved, end; local 59 end = get_clock() + (usecs << 12); 62 if (end < S390_lowcore.clock_comparator) { 64 set_clock_comparator(end); 70 } while (get_clock() < end); 112 u64 end; local 121 u64 end; local [all...] |
/arch/mn10300/include/asm/ |
H A D | cacheflush.h | 25 extern void mn10300_local_icache_inv_range(unsigned long start, unsigned long end); 29 extern void mn10300_local_dcache_inv_range(unsigned long start, unsigned long end); 33 extern void mn10300_icache_inv_range(unsigned long start, unsigned long end); 37 extern void mn10300_dcache_inv_range(unsigned long start, unsigned long end); 42 extern void mn10300_local_dcache_flush_range(unsigned long start, unsigned long end); 46 extern void mn10300_local_dcache_flush_inv_range(unsigned long start, unsigned long end); 50 extern void mn10300_dcache_flush_range(unsigned long start, unsigned long end); 54 extern void mn10300_dcache_flush_inv_range(unsigned long start, unsigned long end); 59 #define mn10300_local_dcache_flush_range(start, end) do {} while (0) 65 #define mn10300_local_dcache_flush_inv_range(start, end) \ [all...] |
/arch/mips/mti-malta/ |
H A D | malta-pci.c | 43 .end = 0x000fffffUL, 93 resource_size_t start, end, map, start1, end1, map1, map2, map3, mask; local 116 end = GT_READ(GT_PCI0M0HD_OFS); 118 end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK); 124 if (end1 - start1 > end - start) { 126 end = end1; 129 mask = ~(start ^ end); 134 gt64120_mem_resource.end = end; [all...] |
/arch/arm/mm/ |
H A D | cache-feroceon-l2.c | 29 * end addresses to successive cp15 registers, and process every 31 * [start:end]. 68 static inline void l2_clean_pa_range(unsigned long start, unsigned long end) argument 73 * Make sure 'start' and 'end' reference the same page, as 77 BUG_ON((start ^ end) >> PAGE_SHIFT); 80 va_end = va_start + (end - start); 99 static inline void l2_inv_pa_range(unsigned long start, unsigned long end) argument 104 * Make sure 'start' and 'end' reference the same page, as 108 BUG_ON((start ^ end) >> PAGE_SHIFT); 111 va_end = va_start + (end 137 calc_range_end(unsigned long start, unsigned long end) argument 166 feroceon_l2_inv_range(unsigned long start, unsigned long end) argument 196 feroceon_l2_clean_range(unsigned long start, unsigned long end) argument 215 feroceon_l2_flush_range(unsigned long start, unsigned long end) argument [all...] |
/arch/hexagon/mm/ |
H A D | cache.c | 25 #define spanlines(start, end) \ 26 (((end - (start & ~(LINESIZE - 1))) >> LINEBITS) + 1) 28 void flush_dcache_range(unsigned long start, unsigned long end) argument 30 unsigned long lines = spanlines(start, end-1); 48 void flush_icache_range(unsigned long start, unsigned long end) argument 50 unsigned long lines = spanlines(start, end-1); 72 void hexagon_clean_dcache_range(unsigned long start, unsigned long end) argument 74 unsigned long lines = spanlines(start, end-1); 92 void hexagon_inv_dcache_range(unsigned long start, unsigned long end) argument 94 unsigned long lines = spanlines(start, end [all...] |
/arch/x86/kernel/ |
H A D | check.c | 30 char *end; local 32 memory_corruption_check = simple_strtol(arg, &end, 10); 34 return (*end == 0) ? 0 : -EINVAL; 40 char *end; local 42 corruption_check_period = simple_strtoul(arg, &end, 10); 44 return (*end == 0) ? 0 : -EINVAL; 50 char *end; local 53 size = memparse(arg, &end); 55 if (*end == '\0') 65 phys_addr_t start, end; local [all...] |
/arch/mips/include/asm/ |
H A D | tlbflush.h | 12 * - flush_tlb_range(vma, start, end) flushes a range of pages 13 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 18 unsigned long start, unsigned long end); 20 unsigned long end); 39 #define flush_tlb_range(vma, vmaddr, end) local_flush_tlb_range(vma, vmaddr, end) 40 #define flush_tlb_kernel_range(vmaddr,end) \ 41 local_flush_tlb_kernel_range(vmaddr, end)
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/arch/arm/plat-s5p/ |
H A D | dev-uart.c | 31 .end = S5P_PA_UART0 + S5P_SZ_UART - 1, 36 .end = IRQ_UART0, 44 .end = S5P_PA_UART1 + S5P_SZ_UART - 1, 49 .end = IRQ_UART1, 57 .end = S5P_PA_UART2 + S5P_SZ_UART - 1, 62 .end = IRQ_UART2, 71 .end = S5P_PA_UART3 + S5P_SZ_UART - 1, 76 .end = IRQ_UART3, 86 .end = S5P_PA_UART4 + S5P_SZ_UART - 1, 91 .end [all...] |
/arch/blackfin/mach-bf561/boards/ |
H A D | tepla.c | 25 .end = 0x2C000320, 29 .end = IRQ_PROG_INTB, 33 .end = IRQ_PF7, 50 .end = BFIN_UART_GCTL+2, 55 .end = IRQ_UART_TX, 60 .end = IRQ_UART_RX, 65 .end = IRQ_UART_ERROR, 70 .end = CH_UART_TX, 75 .end = CH_UART_RX, 101 .end [all...] |
/arch/ia64/include/asm/ |
H A D | patch.h | 21 extern void ia64_patch_mckinley_e9 (unsigned long start, unsigned long end); 22 extern void ia64_patch_vtop (unsigned long start, unsigned long end); 24 extern void ia64_patch_rse (unsigned long start, unsigned long end);
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