Searched refs:id (Results 1 - 25 of 1138) sorted by relevance

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/arch/mips/include/asm/mach-bcm63xx/
H A Dbcm63xx_timer.h4 int bcm63xx_timer_register(int id, void (*callback)(void *data), void *data);
5 void bcm63xx_timer_unregister(int id);
6 int bcm63xx_timer_set(int id, int monotonic, unsigned int countdown_us);
7 int bcm63xx_timer_enable(int id);
8 int bcm63xx_timer_disable(int id);
H A Dbcm63xx_dev_uart.h4 int bcm63xx_uart_register(unsigned int id);
H A Dbcm63xx_clk.h8 int id; member in struct:clk
/arch/arm/mach-davinci/include/mach/
H A Dtime.h26 #define IS_TIMER1(id) (id & 0x2)
27 #define IS_TIMER0(id) (!IS_TIMER1(id))
28 #define IS_TIMER_TOP(id) ((id & 0x1))
29 #define IS_TIMER_BOT(id) (!IS_TIMER_TOP(id))
31 #define ID_TO_TIMER(id) (IS_TIMER1(id) !
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/arch/arm/mach-at91/
H A Dsam9_smc.h11 extern void __init at91sam9_ioremap_smc(int id, u32 addr);
/arch/arm/mach-msm/
H A Dclock-pcom.c28 int pc_clk_enable(unsigned id) argument
30 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL);
34 return (int)id < 0 ? -EINVAL : 0;
37 void pc_clk_disable(unsigned id) argument
39 msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL);
42 int pc_clk_reset(unsigned id, enum clk_reset_action action) argument
47 rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_ASSERT, &id, NULL);
49 rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_DEASSERT, &id, NULL);
54 return (int)id < 0 ? -EINVAL : 0;
57 int pc_clk_set_rate(unsigned id, unsigne argument
70 pc_clk_set_min_rate(unsigned id, unsigned rate) argument
79 pc_clk_set_max_rate(unsigned id, unsigned rate) argument
88 pc_clk_set_flags(unsigned id, unsigned flags) argument
97 pc_clk_get_rate(unsigned id) argument
105 pc_clk_is_enabled(unsigned id) argument
113 pc_clk_round_rate(unsigned id, unsigned rate) argument
120 pc_clk_is_local(unsigned id) argument
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H A Dclock.h35 int (*enable)(unsigned id);
36 void (*disable)(unsigned id);
37 void (*auto_off)(unsigned id);
38 int (*reset)(unsigned id, enum clk_reset_action action);
39 int (*set_rate)(unsigned id, unsigned rate);
40 int (*set_min_rate)(unsigned id, unsigned rate);
41 int (*set_max_rate)(unsigned id, unsigned rate);
42 int (*set_flags)(unsigned id, unsigned flags);
43 unsigned (*get_rate)(unsigned id);
44 unsigned (*is_enabled)(unsigned id);
50 uint32_t id; member in struct:clk
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H A Ddma.c50 void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful) argument
52 writel((graceful << 31), DMOV_FLUSH0(id));
55 void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) argument
64 status = readl(DMOV_STATUS(id));
65 if (list_empty(&ready_commands[id]) &&
68 if (list_empty(&active_commands[id])) {
69 PRINT_FLOW("msm_dmov_enqueue_cmd(%d), enable interrupt\n", id);
70 writel(DMOV_CONFIG_IRQ_EN, DMOV_CONFIG(id));
75 PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status);
76 list_add_tail(&cmd->list, &active_commands[id]);
96 unsigned id; member in struct:msm_dmov_exec_cmdptr_cmd
114 msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) argument
142 unsigned int int_status, mask, id; local
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/arch/arm/mach-pxa/include/mach/
H A Dhardware.h107 #define __cpu_is_pxa210(id) \
109 unsigned int _id = (id) & 0xf3f0; \
113 #define __cpu_is_pxa250(id) \
115 unsigned int _id = (id) & 0xf3ff; \
119 #define __cpu_is_pxa255(id) \
121 unsigned int _id = (id) & 0xffff; \
125 #define __cpu_is_pxa25x(id) \
127 unsigned int _id = (id) & 0xf300; \
131 #define __cpu_is_pxa210(id) (0)
132 #define __cpu_is_pxa250(id) (
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/arch/arm/plat-samsung/include/plat/
H A Dcamport.h25 int s5pv210_fimc_setup_gpio(enum s5p_camport_id id);
26 int exynos4_fimc_setup_gpio(enum s5p_camport_id id);
H A Dfb-core.h30 static inline void s5p_fb_setname(int id, char *name) argument
32 switch (id) {
39 printk(KERN_ERR "%s: invalid device id(%d)\n", __func__, id);
/arch/powerpc/mm/
H A Dmmu_context_nohash.c82 static unsigned int steal_context_smp(unsigned int id) argument
92 mm = context_mm[id];
98 id++;
99 if (id > last_context)
100 id = first_context;
103 pr_hardcont(" | steal %d from 0x%p", id, mm);
106 mm->context.id = MMU_NO_CONTEXT;
116 __set_bit(id, stale_map[i]);
119 return id;
139 static unsigned int steal_context_up(unsigned int id) argument
164 unsigned int id, nrf, nact; local
194 unsigned int i, id, cpu = smp_processor_id(); local
309 unsigned int id; local
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/arch/arm/mach-imx/
H A Ddevices-imx50.h25 #define imx50_add_imx_uart(id, pdata) \
26 imx_add_imx_uart_1irq(&imx50_imx_uart_data[id], pdata)
33 #define imx50_add_imx_i2c(id, pdata) \
34 imx_add_imx_i2c(&imx50_imx_i2c_data[id], pdata)
H A Ddevices-imx51.h21 #define imx51_add_imx_i2c(id, pdata) \
22 imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata)
27 #define imx51_add_imx_ssi(id, pdata) \
28 imx_add_imx_ssi(&imx51_imx_ssi_data[id], pdata)
31 #define imx51_add_imx_uart(id, pdata) \
32 imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata)
38 #define imx51_add_mxc_ehci_hs(id, pdata) \
39 imx_add_mxc_ehci(&imx51_mxc_ehci_hs_data[id - 1], pdata)
46 #define imx51_add_sdhci_esdhc_imx(id, pdata) \
47 imx_add_sdhci_esdhc_imx(&imx51_sdhci_esdhc_imx_data[id], pdat
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H A Ddevices-imx53.h16 #define imx53_add_imx_uart(id, pdata) \
17 imx_add_imx_uart_1irq(&imx53_imx_uart_data[id], pdata)
21 #define imx53_add_imx_i2c(id, pdata) \
22 imx_add_imx_i2c(&imx53_imx_i2c_data[id], pdata)
25 #define imx53_add_sdhci_esdhc_imx(id, pdata) \
26 imx_add_sdhci_esdhc_imx(&imx53_sdhci_esdhc_imx_data[id], pdata)
29 #define imx53_add_ecspi(id, pdata) \
30 imx_add_spi_imx(&imx53_ecspi_data[id], pdata)
33 #define imx53_add_imx2_wdt(id, pdata) \
34 imx_add_imx2_wdt(&imx53_imx2_wdt_data[id])
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/arch/arm/plat-samsung/
H A Ddev-uart.c23 .id = 0,
27 .id = 1,
31 .id = 2,
35 .id = 3,
/arch/m68k/emu/
H A Dnatfeat.c52 long id = nf_get_id("NF_SHUTDOWN"); local
54 if (id)
55 nf_call(id);
60 unsigned long id, version; local
63 id = nf_get_id("NF_VERSION");
64 if (!id)
66 version = nf_call(id);
68 id = nf_get_id("NF_NAME");
69 if (!id)
71 nf_call(id, bu
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/arch/arm/mach-tegra/include/mach/
H A Dpowergate.h44 int tegra_powergate_is_powered(int id);
45 int tegra_powergate_power_on(int id);
46 int tegra_powergate_power_off(int id);
47 int tegra_powergate_remove_clamping(int id);
50 int tegra_powergate_sequence_power_up(int id, struct clk *clk);
/arch/arm/mach-mxs/
H A Ddevices-mx28.h20 #define mx28_add_auart(id) mxs_add_auart(&mx28_auart_data[id])
28 #define mx28_add_fec(id, pdata) \
29 mxs_add_fec(&mx28_fec_data[id], pdata)
32 #define mx28_add_flexcan(id, pdata) \
33 mxs_add_flexcan(&mx28_flexcan_data[id], pdata)
42 #define mx28_add_mxs_i2c(id) mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id])
45 #define mx28_add_mxs_mmc(id, pdata) \
46 mxs_add_mxs_mmc(&mx28_mxs_mmc_data[id], pdat
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/arch/s390/include/asm/
H A Ddebug.h29 } id; member in struct:__debug_entry
79 typedef int (debug_header_proc_t) (debug_info_t* id,
85 typedef int (debug_format_proc_t) (debug_info_t* id,
88 typedef int (debug_prolog_proc_t) (debug_info_t* id,
91 typedef int (debug_input_proc_t) (debug_info_t* id,
97 int debug_dflt_header_fn(debug_info_t* id, struct debug_view* view,
115 debug_entry_t* debug_event_common(debug_info_t* id, int level,
118 debug_entry_t* debug_exception_common(debug_info_t* id, int level,
130 void debug_unregister(debug_info_t* id);
132 void debug_set_level(debug_info_t* id, in
138 debug_event(debug_info_t* id, int level, void* data, int length) argument
146 debug_int_event(debug_info_t* id, int level, unsigned int tag) argument
155 debug_long_event(debug_info_t* id, int level, unsigned long tag) argument
164 debug_text_event(debug_info_t* id, int level, const char* txt) argument
181 debug_exception(debug_info_t* id, int level, void* data, int length) argument
189 debug_int_exception(debug_info_t* id, int level, unsigned int tag) argument
198 debug_long_exception(debug_info_t* id, int level, unsigned long tag) argument
207 debug_text_exception(debug_info_t* id, int level, const char* txt) argument
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/arch/mips/bcm63xx/
H A Ddev-uart.c39 .id = 0,
46 .id = 1,
52 int __init bcm63xx_uart_register(unsigned int id) argument
54 if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
57 if (id == 1 && (!BCMCPU_IS_6358() && !BCMCPU_IS_6368()))
60 if (id == 0) {
67 if (id == 1) {
74 return platform_device_register(&bcm63xx_uart_devices[id]);
/arch/arm/mach-at91/include/mach/
H A Dat91_ramc.h15 #define at91_ramc_read(id, field) \
16 __raw_readl(at91_ramc_base[id] + field)
18 #define at91_ramc_write(id, field, value) \
19 __raw_writel(value, at91_ramc_base[id] + field)
/arch/mips/ath79/
H A Ddev-leds-gpio.h17 void ath79_register_leds_gpio(int id,
/arch/arm/mach-mxs/devices/
H A Dplatform-mxs-pwm.c12 struct platform_device *__init mxs_add_mxs_pwm(resource_size_t iobase, int id) argument
18 res.start = iobase + 0x10 + 0x20 * id;
21 return mxs_add_platform_device("mxs-pwm", id, &res, 1, NULL, 0);
/arch/mips/jz4740/
H A Dpwm.c31 unsigned int id; member in struct:pwm_device
45 struct pwm_device *pwm_request(int id, const char *label) argument
50 if (id < 2 || id > 7 || !jz4740_pwm_clk)
55 pwm = &jz4740_pwm_list[id - 2];
76 jz4740_timer_start(id);
84 jz4740_timer_set_ctrl(pwm->id, 0);
89 jz4740_timer_stop(pwm->id);
99 unsigned int id = pwm->id; local
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