Searched refs:irq (Results 1 - 25 of 1989) sorted by relevance

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/arch/cris/include/asm/
H A Dirq.h4 #include <arch/irq.h>
6 static inline int irq_canonicalize(int irq) argument
8 return irq;
/arch/mips/pci/
H A Dfixup-jmr3927.c36 unsigned char irq = pin; local
39 irq--; /* 0-3 */
44 irq = (irq + 2) % 4;
49 irq = (irq + 0) % 4;
53 irq = (irq + 33 - slot) % 4;
55 irq = (irq
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H A Dfixup-rbtx4938.c18 int irq = tx4938_pcic1_map_irq(dev, slot); local
20 if (irq >= 0)
21 return irq;
22 irq = pin;
24 irq--; /* 0-3 */
28 irq = (irq + 0 + slot) % 4;
32 irq = (irq + 33 - slot) % 4;
34 irq
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H A Dfixup-rbtx4927.c41 unsigned char irq = pin; local
44 irq--; /* 0-3 */
48 irq = (irq + 0 + slot) % 4;
52 irq = (irq + 33 - slot) % 4;
54 irq = (irq + 3 + slot) % 4;
56 irq++; /* 1-4 */
58 switch (irq) {
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H A Dfixup-tb0219.c28 int irq = -1; local
32 irq = TB0219_PCI_SLOT1_IRQ;
35 irq = TB0219_PCI_SLOT2_IRQ;
38 irq = TB0219_PCI_SLOT3_IRQ;
44 return irq;
/arch/arm/plat-samsung/include/plat/
H A Dfiq.h13 extern int s3c24xx_set_fiq(unsigned int irq, bool on);
/arch/mips/include/asm/mach-vr41xx/
H A Dirq.h4 #include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
6 #include_next <irq.h>
/arch/sh/drivers/pci/
H A Dfixups-snapgear.c23 int irq = -1; local
27 case 11: irq = 8; break; /* USB */
28 case 12: irq = 11; break; /* PCMCIA */
29 case 13: irq = 5; break; /* eth0 */
30 case 14: irq = 8; break; /* eth1 */
31 case 15: irq = 11; break; /* safenet (unused) */
34 printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",
35 slot, pin - 1 + 'A', irq);
37 return irq;
H A Dfixups-sh03.c8 int irq; local
22 case 0: irq = 2; break;
23 case 1: irq = 2; break;
24 case 2: irq = 2; break;
25 case 3: irq = 2; break;
26 case 4: irq = 2; break;
27 default: irq = -1; break;
30 return irq;
/arch/mips/include/asm/
H A Dirq.h18 #include <irq.h>
21 static inline int irq_canonicalize(int irq) argument
23 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
26 #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
34 extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
37 static inline void smtc_im_ack_irq(unsigned int irq) argument
39 if (irq_hwmask[irq] & ST0_IM)
40 set_c0_status(irq_hwmask[irq]
45 smtc_im_ack_irq(unsigned int irq) argument
69 handle_on_other_cpu(unsigned int irq) argument
81 handle_on_other_cpu(unsigned int irq) argument
87 smtc_im_backstop(unsigned int irq) argument
100 smtc_handle_on_other_cpu(unsigned int irq) argument
111 smtc_im_backstop(unsigned int irq) argument
112 smtc_handle_on_other_cpu(unsigned int irq) argument
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H A Di8259.h21 #include <irq.h>
40 extern int i8259A_irq_pending(unsigned int irq);
41 extern void make_8259A_irq(unsigned int irq);
52 int irq; local
58 irq = inb(PIC_MASTER_CMD) & 7;
59 if (irq == PIC_CASCADE_IR) {
65 irq = (inb(PIC_SLAVE_CMD) & 7) + 8;
68 if (unlikely(irq == 7)) {
78 irq = -1;
83 return likely(irq >
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/arch/arm/mach-ks8695/include/mach/
H A Dgpio.h17 extern int irq_to_gpio(unsigned int irq);
/arch/tile/include/asm/
H A Dirq.h26 #define irq_canonicalize(irq) (irq)
28 void ack_bad_irq(unsigned int irq);
39 * that the irq can be enabled or disabled from any core at any time.
48 * to tell the generic irq code what kind of interrupt is mapped to a
75 void tile_irq_activate(unsigned int irq, int tile_irq_type);
/arch/m68k/apollo/
H A Ddn_ints.c2 #include <linux/irq.h>
9 unsigned int irq = data->irq; local
11 if (irq < 8)
12 *(volatile unsigned char *)(pica+1) &= ~(1 << irq);
14 *(volatile unsigned char *)(picb+1) &= ~(1 << (irq - 8));
20 unsigned int irq = data->irq; local
22 if (irq < 8)
23 *(volatile unsigned char *)(pica+1) |= (1 << irq);
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/arch/arm/plat-mxc/
H A Dirq-common.h24 int (*set_priority)(unsigned char irq, unsigned char prio);
25 int (*set_irq_fiq)(unsigned int irq, unsigned int type);
/arch/arm/mach-pnx4008/include/mach/
H A Dirq.h2 * arch/arm/mach-pnx4008/include/mach/irq.h
24 #define INTC_BIT(irq) (1<< ((irq) & 0x1F))
26 #define INTC_ER(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x0 + (((irq)&(0x3<<5))<<9)))
27 #define INTC_RSR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x4 + (((irq)&(0x3<<5))<<9)))
28 #define INTC_SR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x8 + (((irq)&(0x3<<5))<<9)))
29 #define INTC_APR(irq) IO_ADDRES
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/arch/m68k/platform/coldfire/
H A Dintc-simr.c17 #include <linux/irq.h>
38 static unsigned int inline irq2ebit(unsigned int irq) argument
40 return irqebitmap[irq - EINT0];
54 static unsigned int inline irq2ebit(unsigned int irq) argument
56 return irq - EINT0;
69 unsigned int irq = d->irq - MCFINT_VECBASE; local
71 if (MCFINTC1_SIMR && (irq > 64))
72 __raw_writeb(irq - 64, MCFINTC1_SIMR);
74 __raw_writeb(irq, MCFINTC0_SIM
79 unsigned int irq = d->irq - MCFINT_VECBASE; local
96 unsigned int irq = d->irq; local
124 unsigned int ebit, irq = d->irq; local
172 int irq, eirq; local
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/arch/sh/include/asm/
H A Dirq.h26 extern void make_maskreg_irq(unsigned int irq);
33 void make_imask_irq(unsigned int irq);
35 static inline int generic_irq_demux(int irq) argument
37 return irq;
40 #define irq_demux(irq) sh_mv.mv_irq_demux(irq)
45 asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
57 extern unsigned int irq_lookup(unsigned int irq);
58 extern void irq_finish(unsigned int irq);
60 #define irq_lookup(irq) (ir
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/arch/m68k/include/asm/
H A Datariints.h21 #include <asm/irq.h>
108 * the MFP. 'type' should be constant, if 'irq' is constant, too, code size is
111 static inline int get_mfp_bit( unsigned irq, int type ) argument
115 mask = 1 << (irq & 7);
117 ((irq & 8) >> 2) + (((irq-8) & 16) << 3);
121 static inline void set_mfp_bit( unsigned irq, int type ) argument
125 mask = 1 << (irq & 7);
127 ((irq & 8) >> 2) + (((irq
132 clear_mfp_bit( unsigned irq, int type ) argument
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/arch/arm/plat-s5p/
H A Dirq.c1 /* arch/arm/plat-s5p/irq.c
15 #include <linux/irq.h>
23 #include <plat/irq-vic-timer.h>
28 int irq; local
31 for (irq = 0; irq < num_vic; irq++)
32 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq],
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/arch/arm/mach-omap2/
H A Domap_hwmod_2xxx_3xxx_ipblock_data.c183 { .irq = 37, },
184 { .irq = -1 }
188 { .irq = 38, },
189 { .irq = -1 }
193 { .irq = 39, },
194 { .irq = -1 }
198 { .irq = 40, },
199 { .irq = -1 }
203 { .irq = 41, },
204 { .irq
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/arch/arm/mach-w90x900/include/mach/
H A Dgpio.h17 #include <asm/irq.h>
25 static inline int irq_to_gpio(unsigned irq) argument
27 return irq;
/arch/hexagon/kernel/
H A Dirq_cpu.c22 #include <asm/irq.h>
27 __vmintop_locdis((long) data->irq);
30 static void mask_irq_num(unsigned int irq) argument
32 __vmintop_locdis((long) irq);
37 __vmintop_locen((long) data->irq);
43 __vmintop_globen((long) data->irq);
83 int irq; local
85 for (irq = 0; irq < HEXAGON_CPUINTS; irq
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/arch/ia64/hp/sim/
H A Dhpsim_irq.c11 #include <linux/irq.h>
42 static void hpsim_irq_set_chip(int irq) argument
44 struct irq_chip *chip = irq_get_chip(irq);
47 irq_set_chip(irq, &irq_type_hp_sim);
50 static void hpsim_connect_irq(int intr, int irq) argument
52 ia64_ssc(intr, irq, 0, 0, SSC_CONNECT_INTERRUPT);
57 int irq = assign_irq_vector(AUTO_ASSIGN); local
59 if (irq >= 0) {
60 hpsim_irq_set_chip(irq);
61 irq_set_handler(irq, handle_simple_ir
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/arch/powerpc/platforms/wsp/
H A Dics.h18 extern void wsp_ics_free_irq(struct device_node *dn, unsigned int irq);
21 extern void wsp_ics_set_msi_chip(unsigned int irq);
22 extern void wsp_ics_set_std_chip(unsigned int irq);

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