/drivers/staging/media/lirc/ |
H A D | lirc_bt829.c | 313 int reg_val; local 314 reg_val = read_index(0x34); 316 reg_val &= 0xFFFFFFDF; 317 reg_val |= 1; 319 reg_val &= 0xFFFFFFFE; 320 reg_val |= 0x20; 322 reg_val |= 0x10; 323 write_index(0x34, reg_val); 325 reg_val = read_index(0x31); 327 reg_val | 338 int reg_val; local 371 write_index(unsigned char index, unsigned int reg_val) argument [all...] |
/drivers/input/keyboard/ |
H A D | imx_keypad.c | 88 unsigned short reg_val; local 99 reg_val = readw(keypad->mmio_base + KPDR); 100 reg_val |= 0xff00; 101 writew(reg_val, keypad->mmio_base + KPDR); 103 reg_val = readw(keypad->mmio_base + KPCR); 104 reg_val &= ~((keypad->cols_en_mask & 0xff) << 8); 105 writew(reg_val, keypad->mmio_base + KPCR); 109 reg_val = readw(keypad->mmio_base + KPCR); 110 reg_val |= (keypad->cols_en_mask & 0xff) << 8; 111 writew(reg_val, keypa 193 unsigned short reg_val; local 296 unsigned short reg_val; local 320 unsigned short reg_val; local 356 unsigned short reg_val; local [all...] |
H A D | tca6416-keypad.c | 94 u16 reg_val, val; local 97 error = tca6416_read_reg(chip, TCA6416_INPUT, ®_val); 101 reg_val &= chip->pinmask; 104 val = reg_val ^ chip->reg_input; 105 chip->reg_input = reg_val; 111 int state = ((reg_val & (1 << i)) ? 1 : 0)
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/drivers/mfd/ |
H A D | adp5520.c | 74 uint8_t reg_val; local 79 ret = __adp5520_read(client, reg, ®_val); 82 reg_val |= bit_mask; 83 ret = __adp5520_write(client, reg, reg_val); 105 uint8_t reg_val; local 110 ret = __adp5520_read(chip->client, reg, ®_val); 112 if (!ret && ((reg_val & bit_mask) != bit_mask)) { 113 reg_val |= bit_mask; 114 ret = __adp5520_write(chip->client, reg, reg_val); 125 uint8_t reg_val; local 177 uint8_t reg_val; local [all...] |
H A D | da9052-i2c.c | 27 int reg_val, ret; local 29 ret = regmap_read(da9052->regmap, DA9052_CONTROL_B_REG, ®_val); 33 if (reg_val & DA9052_CONTROL_B_WRITEMODE) { 34 reg_val &= ~DA9052_CONTROL_B_WRITEMODE; 36 reg_val);
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H A D | twl6030-irq.c | 280 u8 reg_val = 0; local 291 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, ®_val, TWL6030_MMCCTRL); 296 reg_val &= ~VMMC_AUTO_OFF; 297 reg_val |= SW_FC; 298 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL); 305 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, ®_val, 312 reg_val &= ~(MMC_PU | MMC_PD); 313 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
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H A D | da903x.c | 176 uint8_t reg_val; local 181 ret = __da903x_read(chip->client, reg, ®_val); 185 if ((reg_val & bit_mask) != bit_mask) { 186 reg_val |= bit_mask; 187 ret = __da903x_write(chip->client, reg, reg_val); 198 uint8_t reg_val; local 203 ret = __da903x_read(chip->client, reg, ®_val); 207 if (reg_val & bit_mask) { 208 reg_val &= ~bit_mask; 209 ret = __da903x_write(chip->client, reg, reg_val); 220 uint8_t reg_val; local [all...] |
H A D | tps6586x.c | 191 uint8_t reg_val; local 196 ret = __tps6586x_read(to_i2c_client(dev), reg, ®_val); 200 if ((reg_val & bit_mask) != bit_mask) { 201 reg_val |= bit_mask; 202 ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val); 213 uint8_t reg_val; local 218 ret = __tps6586x_read(to_i2c_client(dev), reg, ®_val); 222 if (reg_val & bit_mask) { 223 reg_val &= ~bit_mask; 224 ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val); 235 uint8_t reg_val; local [all...] |
/drivers/staging/sep/ |
H A D | sep_dev.h | 154 u32 reg_val; local 156 reg_val = sep_read_reg(dev, HW_SRAM_DATA_READY_REG_ADDR); 157 } while (!(reg_val & 1));
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/drivers/leds/ |
H A D | leds-lm3530.c | 153 u8 reg_val[LM3530_REG_MAX]; local 217 reg_val[0] = gen_config; /* LM3530_GEN_CONFIG */ 218 reg_val[1] = als_config; /* LM3530_ALS_CONFIG */ 219 reg_val[2] = brt_ramp; /* LM3530_BRT_RAMP_RATE */ 220 reg_val[3] = als_imp_sel; /* LM3530_ALS_IMP_SELECT */ 221 reg_val[4] = brightness; /* LM3530_BRT_CTRL_REG */ 222 reg_val[5] = zones[0]; /* LM3530_ALS_ZB0_REG */ 223 reg_val[6] = zones[1]; /* LM3530_ALS_ZB1_REG */ 224 reg_val[7] = zones[2]; /* LM3530_ALS_ZB2_REG */ 225 reg_val[ [all...] |
H A D | leds-wm831x-status.c | 32 int reg_val; /* Control register value */ member in struct:wm831x_status 52 led->reg_val &= ~(WM831X_LED_SRC_MASK | WM831X_LED_MODE_MASK | 57 led->reg_val |= led->src << WM831X_LED_SRC_SHIFT; 59 led->reg_val |= 2 << WM831X_LED_MODE_SHIFT; 60 led->reg_val |= led->blink_time << WM831X_LED_DUR_SHIFT; 61 led->reg_val |= led->blink_cyc; 64 led->reg_val |= 1 << WM831X_LED_MODE_SHIFT; 69 wm831x_reg_write(led->wm831x, led->reg, led->reg_val); 266 drvdata->reg_val = wm831x_reg_read(wm831x, drvdata->reg); 268 if (drvdata->reg_val [all...] |
/drivers/net/ethernet/intel/ixgbevf/ |
H A D | vf.c | 130 u32 reg_val; local 142 reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)); 143 if (reg_val & IXGBE_RXDCTL_ENABLE) { 144 reg_val &= ~IXGBE_RXDCTL_ENABLE; 145 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 160 reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i)); 161 if (reg_val & IXGBE_TXDCTL_ENABLE) { 162 reg_val &= ~IXGBE_TXDCTL_ENABLE; 163 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
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/drivers/gpio/ |
H A D | gpio-pca953x.c | 145 uint16_t reg_val; local 151 reg_val = chip->reg_direction | (1u << off); 161 ret = pca953x_write_reg(chip, offset, reg_val); 165 chip->reg_direction = reg_val; 176 uint16_t reg_val; local 184 reg_val = chip->reg_output | (1u << off); 186 reg_val = chip->reg_output & ~(1u << off); 196 ret = pca953x_write_reg(chip, offset, reg_val); 200 chip->reg_output = reg_val; 203 reg_val 226 uint16_t reg_val; local 256 uint16_t reg_val; local [all...] |
H A D | gpio-ml-ioh.c | 110 u32 reg_val; local 114 reg_val = ioread32(&chip->reg->regs[chip->ch].po); 116 reg_val |= (1 << nr); 118 reg_val &= ~(1 << nr); 120 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); 136 u32 reg_val; local 144 reg_val = ioread32(&chip->reg->regs[chip->ch].po); 146 reg_val |= (1 << nr); 148 reg_val &= ~(1 << nr); 149 iowrite32(reg_val, 366 u32 reg_val; local [all...] |
H A D | gpio-pch.c | 113 u32 reg_val; local 117 reg_val = ioread32(&chip->reg->po); 119 reg_val |= (1 << nr); 121 reg_val &= ~(1 << nr); 123 iowrite32(reg_val, &chip->reg->po); 139 u32 reg_val; local 146 reg_val = ioread32(&chip->reg->po); 148 reg_val |= (1 << nr); 150 reg_val &= ~(1 << nr); 151 iowrite32(reg_val, 315 u32 reg_val = ioread32(&chip->reg->istatus); local [all...] |
H A D | gpio-adp5520.c | 28 uint8_t reg_val; local 38 adp5520_read(dev->master, ADP5520_GPIO_OUT, ®_val); 40 adp5520_read(dev->master, ADP5520_GPIO_IN, ®_val); 42 return !!(reg_val & dev->lut[off]);
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/drivers/video/backlight/ |
H A D | adp8860_bl.c | 142 uint8_t reg_val; local 147 ret = adp8860_read(client, reg, ®_val); 149 if (!ret && ((reg_val & bit_mask) != bit_mask)) { 150 reg_val |= bit_mask; 151 ret = adp8860_write(client, reg, reg_val); 161 uint8_t reg_val; local 166 ret = adp8860_read(client, reg, ®_val); 168 if (!ret && (reg_val & bit_mask)) { 169 reg_val &= ~bit_mask; 170 ret = adp8860_write(client, reg, reg_val); 435 uint8_t reg_val; local 564 uint8_t reg_val; local 589 uint8_t reg_val; local 608 uint8_t reg_val; local 664 uint8_t reg_val; local [all...] |
H A D | adp8870_bl.c | 156 uint8_t reg_val; local 161 ret = adp8870_read(client, reg, ®_val); 163 if (!ret && ((reg_val & bit_mask) != bit_mask)) { 164 reg_val |= bit_mask; 165 ret = adp8870_write(client, reg, reg_val); 175 uint8_t reg_val; local 180 ret = adp8870_read(client, reg, ®_val); 182 if (!ret && (reg_val & bit_mask)) { 183 reg_val &= ~bit_mask; 184 ret = adp8870_write(client, reg, reg_val); 556 uint8_t reg_val; local 746 uint8_t reg_val; local 775 uint8_t reg_val; local 794 uint8_t reg_val; local 854 uint8_t reg_val; local [all...] |
/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_init.h | 456 u32 reg_val; local 459 reg_val = REG_RD(bp, mcp_attn_ctl_regs[i]); 462 reg_val |= MISC_AEU_ENABLE_MCP_PRTY_BITS; 464 reg_val &= ~MISC_AEU_ENABLE_MCP_PRTY_BITS; 466 REG_WR(bp, mcp_attn_ctl_regs[i], reg_val); 508 u32 reg_val, mcp_aeu_bits = local 524 reg_val = REG_RD(bp, bnx2x_blocks_parity_data[i]. 526 if (reg_val & reg_mask) 530 reg_val & reg_mask); 535 reg_val [all...] |
/drivers/input/mouse/ |
H A D | sentelic.c | 50 static unsigned char fsp_test_swap_cmd(unsigned char reg_val) argument 52 switch (reg_val) { 59 return (reg_val >> 4) | (reg_val << 4); 61 return reg_val; /* swap isn't necessary */ 69 static unsigned char fsp_test_invert_cmd(unsigned char reg_val) argument 71 switch (reg_val) { 78 return ~reg_val; 80 return reg_val; /* inversion isn't necessary */ 84 static int fsp_reg_read(struct psmouse *psmouse, int reg_addr, int *reg_val) argument 141 fsp_reg_write(struct psmouse *psmouse, int reg_addr, int reg_val) argument 214 fsp_page_reg_read(struct psmouse *psmouse, int *reg_val) argument 252 fsp_page_reg_write(struct psmouse *psmouse, int reg_val) argument [all...] |
H A D | alps.c | 1198 int reg_val; local 1200 reg_val = alps_command_mode_read_reg(psmouse, 0x0008); 1201 if (reg_val == -1) 1205 reg_val |= 0x01; 1207 reg_val &= ~0x01; 1209 if (__alps_command_mode_write_reg(psmouse, reg_val)) 1218 int reg_val; local 1220 reg_val = alps_command_mode_read_reg(psmouse, 0x0004); 1221 if (reg_val == -1) 1224 reg_val | 1235 int reg_val; local 1371 int reg_val; local [all...] |
/drivers/w1/masters/ |
H A D | mxc_w1.c | 61 u8 reg_val; local 68 reg_val = __raw_readb(dev->regs + MXC_W1_CONTROL); 70 if (((reg_val >> 7) & 0x1) == 0 || 78 return (reg_val >> 7) & 0x1;
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/drivers/gpu/drm/gma500/ |
H A D | psb_irq.c | 455 uint32_t reg_val = 0; local 464 reg_val = REG_READ(pipeconf_reg); 468 if (!(reg_val & PIPEACONF_ENABLE)) 519 uint32_t reg_val = 0; local 523 reg_val = REG_READ(pipeconf_reg); 527 if (!(reg_val & PIPEACONF_ENABLE)) 568 uint32_t reg_val = 0; local 592 reg_val = REG_READ(pipeconf_reg); 594 if (!(reg_val & PIPEACONF_ENABLE)) {
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/drivers/media/video/ |
H A D | fsl-viu.c | 212 static struct viu_reg reg_val; variable in typeref:struct:viu_reg 442 reg_val.field_base_addr = videobuf_to_dma_contig(&buf->vb); 445 buf, buf->vb.i, (unsigned long)reg_val.field_base_addr); 448 reg_val.status_cfg = 0; 452 reg_val.status_cfg &= ~MODE_32BIT; 453 reg_val.dma_inc = buf->vb.width * 2; 456 reg_val.status_cfg |= MODE_32BIT; 457 reg_val.dma_inc = buf->vb.width * 4; 466 reg_val.picture_count = (buf->vb.height / 2) << 16 | 469 reg_val [all...] |
/drivers/net/ethernet/amd/ |
H A D | amd8111e.c | 128 unsigned int reg_val; local 131 reg_val = readl(mmio + PHY_ACCESS); 132 while (reg_val & PHY_CMD_ACTIVE) 133 reg_val = readl( mmio + PHY_ACCESS ); 138 reg_val = readl(mmio + PHY_ACCESS); 140 } while (--repeat && (reg_val & PHY_CMD_ACTIVE)); 141 if(reg_val & PHY_RD_ERR) 144 *val = reg_val & 0xffff; 159 unsigned int reg_val; local 161 reg_val 188 unsigned int reg_val; local 448 int i,reg_val; local 525 unsigned int reg_val; local [all...] |