Searched refs:start (Results 1 - 25 of 1532) sorted by relevance

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/arch/ia64/scripts/
H A Dcheck-segrel.S2 data4 @segrel(start)
4 start: label
/arch/mn10300/include/asm/
H A Dcacheflush.h24 extern void mn10300_local_icache_inv_page(unsigned long start);
25 extern void mn10300_local_icache_inv_range(unsigned long start, unsigned long end);
26 extern void mn10300_local_icache_inv_range2(unsigned long start, unsigned long size);
28 extern void mn10300_local_dcache_inv_page(unsigned long start);
29 extern void mn10300_local_dcache_inv_range(unsigned long start, unsigned long end);
30 extern void mn10300_local_dcache_inv_range2(unsigned long start, unsigned long size);
32 extern void mn10300_icache_inv_page(unsigned long start);
33 extern void mn10300_icache_inv_range(unsigned long start, unsigned long end);
34 extern void mn10300_icache_inv_range2(unsigned long start, unsigned long size);
36 extern void mn10300_dcache_inv_page(unsigned long start);
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/arch/mn10300/mm/
H A Dcache-disabled.c16 asmlinkage long sys_cacheflush(unsigned long start, unsigned long end) argument
18 if (end < start)
H A Dcache-smp-flush.c32 * @start: The address of the page of memory to be flushed.
37 void mn10300_dcache_flush_page(unsigned long start) argument
41 start &= ~(PAGE_SIZE-1);
44 mn10300_local_dcache_flush_page(start);
45 smp_cache_call(SMP_DCACHE_FLUSH_RANGE, start, start + PAGE_SIZE);
51 * @start: The start address of the region to be flushed.
54 * Flush a range of addresses in the data cache on all CPUs, between start and
57 void mn10300_dcache_flush_range(unsigned long start, unsigne argument
75 mn10300_dcache_flush_range2(unsigned long start, unsigned long size) argument
108 mn10300_dcache_flush_inv_page(unsigned long start) argument
129 mn10300_dcache_flush_inv_range(unsigned long start, unsigned long end) argument
148 mn10300_dcache_flush_inv_range2(unsigned long start, unsigned long size) argument
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H A Dcache-smp-inv.c32 * @start: The address of the page of memory to be invalidated.
37 void mn10300_icache_inv_page(unsigned long start) argument
41 start &= ~(PAGE_SIZE-1);
44 mn10300_local_icache_inv_page(start);
45 smp_cache_call(SMP_ICACHE_INV_RANGE, start, start + PAGE_SIZE);
51 * @start: The start address of the region to be invalidated.
55 * between start and end-1 inclusive.
57 void mn10300_icache_inv_range(unsigned long start, unsigne argument
75 mn10300_icache_inv_range2(unsigned long start, unsigned long size) argument
107 mn10300_dcache_inv_page(unsigned long start) argument
127 mn10300_dcache_inv_range(unsigned long start, unsigned long end) argument
145 mn10300_dcache_inv_range2(unsigned long start, unsigned long size) argument
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H A Dcache-inv-icache.c21 * @start: The starting virtual address of the page part.
28 static void flush_icache_page_range(unsigned long start, unsigned long end) argument
38 off = start & ~PAGE_MASK;
39 size = end - start;
43 pgd = pgd_offset(current->mm, start);
47 pud = pud_offset(pgd, start);
51 pmd = pmd_offset(pud, start);
55 ppte = pte_offset_map(pmd, start);
72 smp_cache_call(SMP_ICACHE_INV_RANGE, start, end);
77 * @start
84 flush_icache_range(unsigned long start, unsigned long end) argument
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H A Dcache-flush-icache.c27 unsigned long start = page_to_phys(page); local
32 mn10300_local_dcache_flush_page(start);
33 mn10300_local_icache_inv_page(start);
35 smp_cache_call(SMP_IDCACHE_INV_FLUSH_RANGE, start, start + PAGE_SIZE);
43 * @start: The starting virtual address of the page part.
50 static void flush_icache_page_range(unsigned long start, unsigned long end) argument
60 off = start & ~PAGE_MASK;
61 size = end - start;
65 pgd = pgd_offset(current->mm, start);
108 flush_icache_range(unsigned long start, unsigned long end) argument
[all...]
/arch/hexagon/mm/
H A Dcache.c25 #define spanlines(start, end) \
26 (((end - (start & ~(LINESIZE - 1))) >> LINEBITS) + 1)
28 void flush_dcache_range(unsigned long start, unsigned long end) argument
30 unsigned long lines = spanlines(start, end-1);
33 start &= ~(LINESIZE - 1);
41 : "r" (start)
43 start += LINESIZE;
48 void flush_icache_range(unsigned long start, unsigned long end) argument
50 unsigned long lines = spanlines(start, end-1);
53 start
72 hexagon_clean_dcache_range(unsigned long start, unsigned long end) argument
92 hexagon_inv_dcache_range(unsigned long start, unsigned long end) argument
[all...]
/arch/sparc/include/asm/
H A Dtlbflush_64.h17 extern void flush_tsb_kernel_range(unsigned long start, unsigned long end);
24 #define flush_tlb_range(vma,start,end) \
25 do { (void)(start); flush_tlb_pending(); } while (0)
32 extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end);
36 #define flush_tlb_kernel_range(start,end) \
37 do { flush_tsb_kernel_range(start,end); \
38 __flush_tlb_kernel_range(start,end); \
43 extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end);
45 #define flush_tlb_kernel_range(start, end) \
46 do { flush_tsb_kernel_range(start,en
[all...]
/arch/blackfin/include/asm/
H A Dcacheflush.h28 #define flush_cache_range(vma, start, end) do { } while (0)
30 #define flush_cache_vmap(start, end) do { } while (0)
31 #define flush_cache_vunmap(start, end) do { } while (0)
34 #define flush_icache_range_others(start, end) \
35 smp_icache_flush_range_others((start), (end))
37 #define flush_icache_range_others(start, end) do { } while (0)
40 static inline void flush_icache_range(unsigned start, unsigned end) argument
44 blackfin_dcache_flush_range(start, end);
47 if (start >= L2_START && end <= L2_START + L2_LENGTH)
48 blackfin_dcache_flush_range(start, en
[all...]
/arch/arm/mm/
H A Dcache-feroceon-l2.c28 * Cache range operations are initiated by writing the start and
31 * [start:end].
68 static inline void l2_clean_pa_range(unsigned long start, unsigned long end) argument
73 * Make sure 'start' and 'end' reference the same page, as
75 * the start address.
77 BUG_ON((start ^ end) >> PAGE_SHIFT);
79 va_start = l2_get_va(start);
80 va_end = va_start + (end - start);
99 static inline void l2_inv_pa_range(unsigned long start, unsigned long end) argument
104 * Make sure 'start' an
137 calc_range_end(unsigned long start, unsigned long end) argument
166 feroceon_l2_inv_range(unsigned long start, unsigned long end) argument
196 feroceon_l2_clean_range(unsigned long start, unsigned long end) argument
215 feroceon_l2_flush_range(unsigned long start, unsigned long end) argument
[all...]
H A Dcache-xsc3l2.c98 static void xsc3_l2_inv_range(unsigned long start, unsigned long end) argument
102 if (start == 0 && end == -1ul) {
112 if (start & (CACHE_LINE_SIZE - 1)) {
113 vaddr = l2_map_va(start & ~(CACHE_LINE_SIZE - 1), vaddr);
116 start = (start | (CACHE_LINE_SIZE - 1)) + 1;
120 * Invalidate all full cache lines between 'start' and 'end'.
122 while (start < (end & ~(CACHE_LINE_SIZE - 1))) {
123 vaddr = l2_map_va(start, vaddr);
125 start
142 xsc3_l2_clean_range(unsigned long start, unsigned long end) argument
180 xsc3_l2_flush_range(unsigned long start, unsigned long end) argument
[all...]
/arch/parisc/math-emu/
H A Dfpbits.h53 #define Bitfield_extract(start, length, object) \
54 ((object) >> (HOSTWDSZ - (start) - (length)) & \
57 #define Bitfield_signed_extract(start, length, object) \
58 ((int)((object) << start) >> (HOSTWDSZ - (length)))
60 #define Bitfield_mask(start, len, object) \
61 ((object) & (((unsigned)-1 >> (HOSTWDSZ-len)) << (HOSTWDSZ-start-len)))
63 #define Bitfield_deposit(value,start,len,object) object = \
64 ((object) & ~(((unsigned)-1 >> (HOSTWDSZ-len)) << (HOSTWDSZ-start-len))) | \
65 (((value) & ((unsigned)-1 >> (HOSTWDSZ-len))) << (HOSTWDSZ-start-len))
/arch/frv/include/asm/
H A Dcacheflush.h24 #define flush_cache_range(mm, start, end) do {} while(0)
26 #define flush_cache_vmap(start, end) do {} while(0)
27 #define flush_cache_vunmap(start, end) do {} while(0)
35 extern void frv_dcache_writeback(unsigned long start, unsigned long size);
36 extern void frv_cache_invalidate(unsigned long start, unsigned long size);
37 extern void frv_icache_invalidate(unsigned long start, unsigned long size);
38 extern void frv_cache_wback_inv(unsigned long start, unsigned long size);
71 static inline void flush_icache_range(unsigned long start, unsigned long end) argument
73 frv_cache_wback_inv(start, end);
78 unsigned long start, unsigne
80 flush_icache_user_range(struct vm_area_struct *vma, struct page *page, unsigned long start, unsigned long len) argument
[all...]
/arch/mips/powertv/asic/
H A Dprealloc.h30 .start = (START), \
44 #define PREALLOC_NORMAL(name, start, end, flags) \
45 PREALLOC(name, start, end, flags)
47 #define PREALLOC_NORMAL(name, start, end, flags)
51 #define PREALLOC_TFTP(name, start, end, flags) \
52 PREALLOC(name, start, end, flags)
54 #define PREALLOC_TFTP(name, start, end, flags)
58 #define PREALLOC_DOCSIS(name, start, end, flags) \
59 PREALLOC(name, start, end, flags)
61 #define PREALLOC_DOCSIS(name, start, en
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H A Dprealloc-gaia.c37 .start = 0x24000000,
43 .start = 0x24200000,
49 .start = 0x24202000,
60 .start = 0x60000000,
66 .start = 0x60200000,
72 .start = 0x60202000,
91 .start = 0x00000000,
97 .start = 0x00000000,
103 .start = 0x00000000,
109 .start
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/arch/arm/mach-exynos/
H A Ddev-sysmmu.c44 .start = EXYNOS4_PA_SYSMMU_MDMA,
49 .start = IRQ_SYSMMU_MDMA0_0,
54 .start = EXYNOS4_PA_SYSMMU_SSS,
59 .start = IRQ_SYSMMU_SSS_0,
64 .start = EXYNOS4_PA_SYSMMU_FIMC0,
69 .start = IRQ_SYSMMU_FIMC0_0,
74 .start = EXYNOS4_PA_SYSMMU_FIMC1,
79 .start = IRQ_SYSMMU_FIMC1_0,
84 .start = EXYNOS4_PA_SYSMMU_FIMC2,
89 .start
[all...]
/arch/mips/mti-malta/
H A Dmalta-pci.c42 .start = 0x00000000UL,
93 resource_size_t start, end, map, start1, end1, map1, map2, map3, mask; local
115 start = GT_READ(GT_PCI0M0LD_OFS);
118 end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK);
124 if (end1 - start1 > end - start) {
125 start = start1;
129 mask = ~(start ^ end);
131 BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) &&
133 gt64120_mem_resource.start = start;
[all...]
/arch/powerpc/include/asm/
H A Dsparsemem.h19 extern int create_section_mapping(unsigned long start, unsigned long end);
20 extern int remove_section_mapping(unsigned long start, unsigned long end);
/arch/sh/include/asm/
H A Dtlbflush.h10 * - flush_tlb_range(vma, start, end) flushes a range of pages
11 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
16 unsigned long start,
20 extern void local_flush_tlb_kernel_range(unsigned long start,
30 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
33 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
43 #define flush_tlb_range(vma, start, end) \
44 local_flush_tlb_range(vma, start, end)
46 #define flush_tlb_kernel_range(start, end) \
47 local_flush_tlb_kernel_range(start, en
[all...]
/arch/x86/include/asm/
H A Dpat.h15 extern int reserve_memtype(u64 start, u64 end,
17 extern int free_memtype(u64 start, u64 end);
22 int io_reserve_memtype(resource_size_t start, resource_size_t end,
25 void io_free_memtype(resource_size_t start, resource_size_t end);
/arch/c6x/include/asm/
H A Dcache.h59 extern void enable_caching(unsigned long start, unsigned long end);
60 extern void disable_caching(unsigned long start, unsigned long end);
73 extern void L1P_cache_block_invalidate(unsigned int start, unsigned int end);
74 extern void L1D_cache_block_invalidate(unsigned int start, unsigned int end);
75 extern void L1D_cache_block_writeback_invalidate(unsigned int start,
77 extern void L1D_cache_block_writeback(unsigned int start, unsigned int end);
78 extern void L2_cache_block_invalidate(unsigned int start, unsigned int end);
79 extern void L2_cache_block_writeback(unsigned int start, unsigned int end);
80 extern void L2_cache_block_writeback_invalidate(unsigned int start,
82 extern void L2_cache_block_invalidate_nowait(unsigned int start,
[all...]
/arch/hexagon/include/asm/
H A Dtlbflush.h41 unsigned long start, unsigned long end);
42 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
56 #define flush_tlb_pgtables(mm, start, end)
/arch/parisc/include/asm/
H A Ddelay.h23 unsigned long start; local
32 start = mfctl(16);
33 while ((mfctl(16) - start) < clocks)
/arch/mips/bcm63xx/
H A Ddev-enet.c18 .start = -1, /* filled at runtime */
35 .start = -1, /* filled at runtime */
40 .start = -1, /* filled at runtime */
44 .start = -1, /* filled at runtime */
48 .start = -1, /* filled at runtime */
67 .start = -1, /* filled at runtime */
72 .start = -1, /* filled at runtime */
76 .start = -1, /* filled at runtime */
80 .start = -1, /* filled at runtime */
111 shared_res[0].start
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