/drivers/video/kyro/ |
H A D | STG4000Ramdac.c | 29 u32 tmp = 0; local 35 tmp = STG_READ_REG(SoftwareReset); 37 if (tmp & 0x1) { 39 STG_WRITE_REG(SoftwareReset, tmp); 43 tmp = STG_READ_REG(DACPixelFormat); 53 tmp |= _16BPP; 60 tmp |= _32BPP; 67 STG_WRITE_REG(DACPixelFormat, tmp); 76 tmp = STG_READ_REG(DACPrimSize); 79 tmp | 149 u32 tmp; local 158 u32 tmp; local [all...] |
H A D | STG4000VTG.c | 19 u32 tmp; local 23 tmp = STG_READ_REG(SoftwareReset); 25 STG_WRITE_REG(SoftwareReset, tmp); 33 tmp = STG_READ_REG(SoftwareReset); 34 tmp |= SET_BIT(8); 35 STG_WRITE_REG(SoftwareReset, tmp); 40 u32 tmp = 0; local 43 tmp = (STG_READ_REG(DACSyncCtrl)) | SET_BIT(0) | SET_BIT(2); 45 STG_WRITE_REG(DACSyncCtrl, tmp); 50 u32 tmp local 62 u32 tmp = 0; local [all...] |
H A D | STG4000OverlayDevice.c | 81 u32 tmp; local 84 tmp = STG_READ_REG(DACOverlayAddr); 87 STG_WRITE_REG(DACOverlayAddr, tmp); 90 tmp = STG_READ_REG(DACOverlayUAddr); 92 STG_WRITE_REG(DACOverlayUAddr, tmp); 95 tmp = STG_READ_REG(DACOverlayVAddr); 97 STG_WRITE_REG(DACOverlayVAddr, tmp); 100 tmp = STG_READ_REG(DACOverlaySize); 103 STG_WRITE_REG(DACOverlaySize, tmp); 106 tmp 147 u32 tmp; local 246 u32 tmp; local 290 u32 tmp; local 342 u32 tmp, ulStride; local [all...] |
/drivers/staging/olpc_dcon/ |
H A D | olpc_dcon_xo_1_5.c | 51 u_int8_t tmp; local 54 tmp = inb(VX855_GPI_STATUS_CHG); 55 return !!(tmp & BIT_GPIO12); 63 u_int8_t tmp; local 73 pci_read_config_byte(pdev, 0x95, &tmp); 74 pci_write_config_byte(pdev, 0x95, tmp|0x0c); 77 pci_read_config_byte(pdev, 0xe3, &tmp); 78 pci_write_config_byte(pdev, 0xe3, tmp | 0x04); 81 pci_read_config_byte(pdev, 0xe4, &tmp); 82 pci_write_config_byte(pdev, 0xe4, tmp| 116 unsigned char tmp; local [all...] |
/drivers/gpu/drm/nouveau/ |
H A D | nv40_mc.c | 15 u32 tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA); local 16 nv_wr32(dev, NV40_PMC_1700, tmp); 19 nv_wr32(dev, NV40_PMC_170C, tmp);
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/drivers/video/via/ |
H A D | via_aux_vt1621.c | 37 u8 tmp; local 39 if (!via_aux_read(&drv, 0x1B, &tmp, 1) || tmp != 0x02)
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H A D | via_aux_ch7301.c | 37 u8 tmp; local 39 if (!via_aux_read(&drv, 0x4B, &tmp, 1) || tmp != 0x17)
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H A D | via_aux_vt1622.c | 37 u8 tmp; local 39 if (!via_aux_read(&drv, 0x1B, &tmp, 1) || tmp != 0x03)
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H A D | via_aux_vt1625.c | 37 u8 tmp; local 39 if (!via_aux_read(&drv, 0x1B, &tmp, 1) || tmp != 0x50)
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H A D | via_aux_vt1631.c | 39 u8 tmp[len]; local 41 if (!via_aux_read(&drv, 0x00, tmp, len) || memcmp(id, tmp, len))
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H A D | via_aux_vt1636.c | 39 u8 tmp[len]; local 41 if (!via_aux_read(&drv, 0x00, tmp, len) || memcmp(id, tmp, len))
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/drivers/gpu/drm/radeon/ |
H A D | rs400.c | 62 uint32_t tmp; local 67 tmp = RREG32_MC(RS480_GART_CACHE_CNTRL); 68 if ((tmp & RS480_GART_CACHE_INVALIDATE) == 0) 110 uint32_t tmp; local 113 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); 114 tmp |= RS690_DIS_OUT_OF_PCI_GART_ACCESS; 115 WREG32_MC(RS690_AIC_CTRL_SCRATCH, tmp); 150 tmp = REG_SET(RS690_MC_AGP_TOP, rdev->mc.gtt_end >> 16); 151 tmp |= REG_SET(RS690_MC_AGP_START, rdev->mc.gtt_start >> 16); 153 WREG32_MC(RS690_MCCFG_AGP_LOCATION, tmp); 194 uint32_t tmp; local 232 uint32_t tmp; local 295 uint32_t tmp; local [all...] |
H A D | radeon_clocks.c | 195 u32 tmp = RREG32_PLL(RADEON_PPLL_REF_DIV); local 198 (tmp & R300_PPLL_REF_DIV_ACC_MASK) >> R300_PPLL_REF_DIV_ACC_SHIFT; 200 p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK; 388 uint32_t tmp; local 395 tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL); 396 tmp &= ~RADEON_DONT_USE_XTALIN; 397 WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp); 399 tmp = RREG32_PLL(RADEON_SCLK_CNTL); 400 tmp &= ~RADEON_SCLK_SRC_SEL_MASK; 401 WREG32_PLL(RADEON_SCLK_CNTL, tmp); 473 uint32_t tmp; local [all...] |
/drivers/cpufreq/ |
H A D | exynos4x12-cpufreq.c | 304 unsigned int tmp; local 309 tmp = exynos4x12_clkdiv_table[div_index].clkdiv; 311 __raw_writel(tmp, EXYNOS4_CLKDIV_CPU); 317 tmp = exynos4x12_clkdiv_table[div_index].clkdiv1; 319 __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1); 331 unsigned int tmp, pdiv; local 338 tmp = (__raw_readl(EXYNOS4_CLKMUX_STATCPU) 340 tmp &= 0x7; 341 } while (tmp != 0x2); 349 tmp 381 unsigned int tmp; local 435 unsigned int tmp; local [all...] |
H A D | exynos4210-cpufreq.c | 118 unsigned int tmp; local 122 tmp = exynos4210_clkdiv_table[div_index].clkdiv; 124 __raw_writel(tmp, EXYNOS4_CLKDIV_CPU); 127 tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU); 128 } while (tmp & 0x1111111); 132 tmp = __raw_readl(EXYNOS4_CLKDIV_CPU1); 134 tmp &= ~((0x7 << 4) | 0x7); 136 tmp |= ((clkdiv_cpu1[div_index][0] << 4) | 139 __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1); 142 tmp 148 unsigned int tmp; local 193 unsigned int tmp; local 235 unsigned int tmp; local [all...] |
H A D | exynos5250-cpufreq.c | 136 unsigned int tmp; local 140 tmp = exynos5250_clkdiv_table[div_index].clkdiv; 142 __raw_writel(tmp, EXYNOS5_CLKDIV_CPU0); 148 tmp = exynos5250_clkdiv_table[div_index].clkdiv1; 150 __raw_writel(tmp, EXYNOS5_CLKDIV_CPU1); 159 unsigned int tmp, pdiv; local 166 tmp = (__raw_readl(EXYNOS5_CLKMUX_STATCPU) >> 16); 167 tmp &= 0x7; 168 } while (tmp != 0x2); 176 tmp 209 unsigned int tmp; local 268 unsigned int tmp; local [all...] |
/drivers/scsi/mvsas/ |
H A D | mv_64xx.c | 47 u32 tmp; local 49 tmp = mr32(MVS_PCS); 51 tmp |= 1 << (phy_id + PCS_EN_PORT_XMT_SHIFT); 53 tmp |= 1 << (phy_id + PCS_EN_PORT_XMT_SHIFT2); 54 mw32(MVS_PCS, tmp); 86 u32 reg, tmp; local 97 tmp = reg; 99 tmp |= (1U << phy_id) << PCTL_LINK_OFFS; 101 tmp |= (1U << (phy_id - MVS_SOC_PORTS)) << PCTL_LINK_OFFS; 105 pci_write_config_dword(mvi->pdev, PCR_PHY_CTL, tmp); 122 u32 tmp; local 142 u32 tmp; local 162 u32 tmp; local 212 u32 tmp; local 234 u32 tmp; local 257 u32 tmp, cctl; local 438 u32 tmp; local 447 u32 tmp; local 484 u32 tmp; local 499 u32 tmp; local 513 u32 tmp, offs; local 538 u32 tmp, offs; local 623 u32 tmp; local 640 u32 tmp; local 660 u32 tmp; local 756 u32 tmp = 0; local [all...] |
H A D | mv_94xx.c | 54 u32 tmp, setting_0 = 0, setting_1 = 0; local 97 tmp = mvs_read_port_vsr_data(mvi, phy_id); 98 tmp &= ~(0xFBE << 16); 99 tmp |= (((phy_tuning.trans_emp_en << 11) | 102 mvs_write_port_vsr_data(mvi, phy_id, tmp); 106 tmp = mvs_read_port_vsr_data(mvi, phy_id); 107 tmp &= ~(0xC000); 108 tmp |= (phy_tuning.trans_amp_adj << 14); 109 mvs_write_port_vsr_data(mvi, phy_id, tmp); 116 u32 tmp; local 264 u32 tmp; local 273 u32 tmp; local 305 u32 tmp; local 313 u32 tmp; local 338 u32 tmp, cctl; local 565 u32 tmp; local 580 u32 tmp; local 623 u32 tmp; local 639 u32 tmp; local 672 u32 tmp; local 867 u32 tmp; local 882 u32 tmp; local 989 u32 tmp = 0; local [all...] |
/drivers/isdn/hardware/eicon/ |
H A D | istream.c | 79 char tmp[4]; local 88 (dword *)&tmp[0], 90 if (tmp[0] & DIVA_DFIFO_READY) { /* No free blocks more */ 109 tmp[1] = (char)to_write; 110 tmp[0] = (tmp[0] & DIVA_DFIFO_WRAP) | 113 if (tmp[0] & DIVA_DFIFO_LAST) { 114 tmp[2] = usr1; 115 tmp[3] = usr2; 123 (dword *)&tmp[ 157 char tmp[4]; local [all...] |
/drivers/staging/comedi/drivers/ |
H A D | pcm_common.c | 12 unsigned int tmp; local 16 tmp = cmd->start_src; 18 if (!cmd->start_src || tmp != cmd->start_src) 21 tmp = cmd->scan_begin_src; 23 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src) 26 tmp = cmd->convert_src; 28 if (!cmd->convert_src || tmp != cmd->convert_src) 31 tmp = cmd->scan_end_src; 33 if (!cmd->scan_end_src || tmp != cmd->scan_end_src) 36 tmp [all...] |
H A D | c6xdigio.c | 150 unsigned tmp; local 167 tmp = ReadByteFromHwPort(baseAddr + 1); 168 while (((tmp & 0x80) == 0) && (timeout < C6XDIGIO_TIME_OUT)) { 169 tmp = ReadByteFromHwPort(baseAddr + 1); 175 tmp = ReadByteFromHwPort(baseAddr + 1); 176 while (((tmp & 0x80) == 0x80) && (timeout < C6XDIGIO_TIME_OUT)) { 177 tmp = ReadByteFromHwPort(baseAddr + 1); 182 tmp = ReadByteFromHwPort(baseAddr + 1); 183 while (((tmp & 0x80) == 0) && (timeout < C6XDIGIO_TIME_OUT)) { 184 tmp 218 int tmp; local [all...] |
/drivers/usb/gadget/ |
H A D | config.c | 125 struct usb_descriptor_header **tmp; local 132 for (bytes = 0, n_desc = 0, tmp = src; *tmp; tmp++, n_desc++) 133 bytes += (*tmp)->bLength; 134 bytes += (n_desc + 1) * sizeof(*tmp); 140 /* fill in pointers starting at "tmp", 144 tmp = mem; 146 mem += (n_desc + 1) * sizeof(*tmp); 149 *tmp [all...] |
/drivers/video/aty/ |
H A D | radeon_pm.c | 131 u32 tmp; local 136 tmp = INPLL(pllSCLK_CNTL); 137 tmp &= ~SCLK_CNTL__DYN_STOP_LAT_MASK; 138 tmp |= SCLK_CNTL__CP_MAX_DYN_STOP_LAT | SCLK_CNTL__FORCEON_MASK; 139 OUTPLL(pllSCLK_CNTL, tmp); 141 tmp = INPLL(pllMCLK_CNTL); 142 tmp |= (MCLK_CNTL__FORCE_MCLKA | 148 OUTPLL(pllMCLK_CNTL, tmp); 153 tmp = INPLL(pllSCLK_CNTL); 154 tmp | 332 u32 tmp; local 833 u32 tmp; local 1432 u32 tmp, tmp2; local 1457 u32 tmp; local 1471 u32 tmp; local 1578 u32 r2ec, tmp; local 1633 u32 tmp; local 1720 u32 tmp, i; local 1973 u32 tmp, i; local 2533 u32 tmp; local [all...] |
/drivers/pnp/isapnp/ |
H A D | core.c | 369 unsigned char tag, tmp[2]; local 376 isapnp_peek(tmp, 2); 377 *size = (tmp[1] << 8) | tmp[0]; 405 unsigned char tmp[6]; local 410 isapnp_peek(tmp, size); 411 eisa_id = tmp[0] | tmp[1] << 8 | tmp[2] << 16 | tmp[ 434 unsigned char tmp[3]; local 458 unsigned char tmp[2]; local 471 unsigned char tmp[7]; local 492 unsigned char tmp[3]; local 509 unsigned char tmp[9]; local 530 unsigned char tmp[17]; local 551 unsigned char tmp[9]; local 588 unsigned char type, tmp[17]; local 722 unsigned char type, tmp[17]; local 939 int tmp; local [all...] |
/drivers/ssb/ |
H A D | driver_chipcommon.c | 45 u32 tmp; local 72 tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL); 73 tmp |= SSB_CHIPCO_SLOWCLKCTL_FSLOW; 74 chipco_write32(cc, SSB_CHIPCO_SLOWCLKCTL, tmp); 79 tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL); 80 tmp &= ~SSB_CHIPCO_SLOWCLKCTL_FSLOW; 81 tmp |= SSB_CHIPCO_SLOWCLKCTL_IPLL; 82 chipco_write32(cc, SSB_CHIPCO_SLOWCLKCTL, tmp); 92 tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL); 93 tmp 153 u32 tmp; local 261 unsigned int tmp; local 366 u32 tmp; local [all...] |