Searched refs:d2 (Results 1 - 25 of 94) sorted by relevance

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/arch/m68k/lib/
H A Dudivsi3.S74 #define d2 REG (d2) define
95 movel d2, sp@-
101 movel d0, d2
102 clrw d2
103 swap d2
104 divu d1, d2 /* high quotient in lower word */
105 movew d2, d0 /* save high quotient */
107 movew sp@(10), d2 /* get low dividend + high rest */
108 divu d1, d2 /* lo
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H A Ddivsi3.S74 #define d2 REG (d2) define
94 movel d2, sp@-
96 moveq IMM (1), d2 /* sign of result stored in d2 (=1 or =-1) */
101 negb d2 /* change sign because divisor <0 */
103 negl d2 /* change sign because divisor <0 */
109 negb d2
111 negl d2
119 tstb d2
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/arch/mn10300/kernel/
H A Dmn10300-serial-low.S44 movm [d2,d3,a2,a3,exreg0],(sp)
70 mov GxICR_DETECT,d2
71 movbu d2,(e3) # ACK the interrupt
72 movhu (e3),d2 # flush
78 mov (__rx_outp,a3),d2
79 cmp d3,d2
82 mov (__rx_buffer,a3),d2
83 add d2,a2
84 movhu (SCxSTR,e2),d2
85 movbu d2,(
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H A Dgdb-io-serial-low.S35 movm [d2,d3,a2,a3],(sp)
38 movbu (GDBPORT_SERIAL_IIR),d2
53 movbu (GDBPORT_SERIAL_RX),d2
55 movbu d2,(gdbstub_rx_buffer,a2)
60 mov GxICR_DETECT,d2
61 movbu d2,(XIRQxICR(GDBPORT_SERIAL_IRQ)) # ACK the interrupt
62 movhu (XIRQxICR(GDBPORT_SERIAL_IRQ)),d2 # flush
63 movm (sp),[d2,d3,a2,a3]
H A Dkthread.S28 mov d2,d0
H A Dprofile-low.S34 movm [d2,d3,a2],(sp)
37 mov (12,sp),d2
38 and EPSW_nSL,d2
48 mov (16,sp),d2
49 sub _stext,d2
51 lsr d3,d2
53 cmp d3,d2
58 asl2 d2
59 mov (a2,d2),d3
61 mov d3,(a2,d2)
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H A Dgdb-io-ttysm-low.S35 movm [d2,d3,a2,a3],(sp)
49 movbu (SCgRXB),d2
51 movbu d2,(gdbstub_rx_buffer,a2)
56 mov GxICR_DETECT,d2
57 movbu d2,(GxICR(SCgRXIRQ)) # ACK the interrupt
58 movhu (GxICR(SCgRXIRQ)),d2 # flush
60 movm (sp),[d2,d3,a2,a3]
H A Dsmp-low.S65 mov GxICR_DETECT,d2
66 movbu d2,(GxICR(FLUSH_CACHE_IPI)) # ACK the interrupt
67 movhu (GxICR(FLUSH_CACHE_IPI)),d2
/arch/mn10300/lib/
H A Dmemcpy.S24 movm [d2,d3],(sp)
27 mov (20,sp),d2 # count
32 cmp +0,d2
37 or d2,d3
42 cmp +31,d2
46 add -32,d2
67 sub d3,d2
71 add d3,d2
76 cmp +16,d2
86 add -16,d2
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H A Dmemset.S24 movm [d2,d3],(sp)
27 mov (20,sp),d2 # count
31 cmp +0,d2
35 or d0,d2,d3
46 cmp +31,d2
49 add -32,d2
62 sub d3,d2
65 add d3,d2
70 cmp +16,d2
76 add -16,d2
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H A Ddo_csum.S24 movm [d2,d3],(sp)
25 mov d1,d2 # count
30 cmp +0,d2
43 add -1,d2
46 cmp +2,d2
52 add -2,d2
53 cmp +4,d2
58 cmp +31,d2
61 add -32,d2
83 sub d3,d2
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H A Dmemmove.S30 movm [d2,d3],(sp)
33 mov (20,sp),d2 # count
34 add d0,d2,a0 # dst end
35 add d1,d2,a1 # src end
38 cmp +0,d2
43 or d2,d3
49 cmp +31,d2
52 add -32,d2
84 sub d3,d2
87 add d3,d2
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/arch/x86/lib/
H A Dstring_32.c19 int d0, d1, d2; local
24 : "=&S" (d0), "=&D" (d1), "=&a" (d2)
34 int d0, d1, d2, d3; local
44 : "=&S" (d0), "=&D" (d1), "=&c" (d2), "=&a" (d3)
54 int d0, d1, d2, d3; local
62 : "=&S" (d0), "=&D" (d1), "=&a" (d2), "=&c" (d3)
72 int d0, d1, d2, d3; local
85 : "=&S" (d0), "=&D" (d1), "=&a" (d2), "=&c" (d3)
120 int d0, d1, d2; local
133 : "=a" (res), "=&S" (d0), "=&D" (d1), "=&c" (d2)
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H A Dmemcpy_32.c25 int d0,d1,d2,d3,d4,d5; local
198 : "=&c" (d0), "=&S" (d1), "=&D" (d2),
/arch/mn10300/mm/
H A Dtlb-mn10300.S31 movm [d2,d3,a2],(sp)
41 mov (MMUCTR),d2
42 mov d2,(MMUCTR)
48 mov d3,d2
49 and 0xffc00000,d2
50 lsr 20,d2
51 mov (a2,d2),a2 # PTD *ptd = PGD[addr 31..22]
56 mov d3,d2
57 and 0x003ff000,d2
58 lsr 10,d2
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H A Dcache-flush-by-reg.S110 movm [d2,d3,a2],(sp)
112 movhu (CHCTR),d2
113 btst CHCTR_DCEN,d2
121 # d2 = alignsize;
123 mov L1_CACHE_BYTES,d2
129 add d2,d2
145 mov d2,d1
165 add d2,a2 # a2 += alignsize
172 ret [d2,d
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/arch/m68k/math-emu/
H A Dfp_movem.S52 btst #11,%d2
54 bfextu %d2{#24,#8},%d0 | static register list
56 1: bfextu %d2{#25,#3},%d0 | dynamic register list
67 btst #12,%d2
72 2: btst #13,%d2
135 btst #12,%d2
139 1: btst #13,%d2
144 getuser.l (%a0)+,%d2,fp_err_ua1,%a0
145 lsr.l #8,%d2
146 lsr.l #7,%d2
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H A Dfp_decode.h51 * d2 - contains first two instruction words,
73 bfextu %d2{#8,#2},%d0
85 bfextu %d2{#16,#3},%d0
99 bfextu %d2{#19,#3},%d0
104 bfextu %d2{#19,#3},%d0
109 bfextu %d2{#22,#3},%d0
115 bfextu %d2{#10,#3},%d0
130 bfextu %d2{#13,#3},%d0
135 move.b %d2,%d0
141 bfextu %d2{#1
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H A Dfp_move.S84 move.l %d1,%d2
99 swap %d2
100 move.w %d2,%d0
103 move.w %d2,%d1
111 swap %d2
112 move.w %d2,%d0
115 move.l %d2,%d1
122 swap %d2
123 move.w %d2,%d1
130 swap %d2
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/arch/m68k/fpsp040/
H A Dstwotox.S233 movel %d2,-(%sp)
237 movel %d0,%d2
241 asrl #6,%d2 | ...d2 IS L, N = 64L + J
242 movel %d2,%d0
244 subl %d0,%d2 | ...d2 IS M', N = 64(M+M') + J
245 addil #0x3FFF,%d2
246 movew %d2,ADJFACT(%a6) | ...ADJFACT IS 2^(M')
247 movel (%sp)+,%d2
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H A Dbinstr.S7 | Input: 64-bit binary integer in d2:d3, desired length (LEN) in
26 | Copy the fraction in d2:d3 to d4:d5.
28 | A3. Multiply the fraction in d2:d3 by 8 using bit-field
29 | extracts and shifts. The three msbs from d2 will go into
35 | A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5
36 | into d2:d3. D1 will contain the bcd digit formed.
51 | d2: upper 32-bits of fraction for mul by 8
81 | A2. Copy d2:d3 to d4:d5. Start loop.
84 movel %d2,%d4 |copy the fraction before muls
87 | A3. Multiply d2
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H A Dround.S144 moveml %d2/%d3,-(%a7) |make some temp registers
149 movel #30,%d2 |of the sgl prec. limits
150 lsll %d2,%d3 |shift g-r bits to MSB of d3
151 movel LOCAL_HI(%a0),%d2 |get word 2 for s-bit test
152 andil #0x0000003f,%d2 |s bit is the or of all other
161 movel #30,%d2 |of the dbl prec. limits
162 lsll %d2,%d3 |shift g-r bits to the MSB of d3
163 movel LOCAL_LO(%a0),%d2 |get lower mantissa for s-bit test
164 andil #0x000001ff,%d2 |s bit is the or-ing of all
173 moveml (%a7)+,%d2/
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/arch/mn10300/include/asm/
H A Dsigcontext.h23 unsigned long d2; member in struct:sigcontext
/arch/m68k/platform/coldfire/
H A Dentry.S65 GET_CURRENT(%d2)
75 movel %sp,%d2 /* get thread_info pointer */
76 andl #-THREAD_SIZE,%d2 /* at start of kernel stack */
77 movel %d2,%a0
88 movel #-ENOSYS,%d2 /* strace needs -ENOSYS in PT_OFF_D0 */
89 movel %d2,PT_OFF_D0(%sp) /* on syscall entry */
167 GET_CURRENT(%d2)
/arch/m68k/ifpsp060/src/
H A Ditest.S170 mov.l &0x99999999,%d2
177 mulu.l %d1,%d2:%d3
194 mov.l &0x99999999,%d2
201 mulu.l %d1,%d2:%d3
218 mov.l &0x66666666,%d2
224 mulu.l %d1,%d2:%d2
240 mov.l &0x00000000,%d2
247 mulu.l %d1,%d2:%d3
264 mov.l &0x00000000,%d2
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