Searched refs:IER (Results 1 - 25 of 39) sorted by relevance

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/drivers/tty/
H A Dmxser.c239 int IER; /* Interrupt Enable Register */ member in struct:mxser_port
711 info->IER &= ~UART_IER_MSI;
715 info->IER |= UART_IER_MSI;
725 outb(info->IER & ~UART_IER_THRI,
728 info->IER |= UART_IER_THRI;
729 outb(info->IER, info->ioaddr +
739 info->IER &= ~UART_IER_THRI;
740 outb(info->IER, info->ioaddr +
754 info->IER |= UART_IER_MSI;
756 outb(info->IER, inf
[all...]
H A Damiserial.c107 int IER; /* Interrupt Enable Register */ member in struct:serial_state
196 if (info->IER & UART_IER_THRI) {
197 info->IER &= ~UART_IER_THRI;
218 && !(info->IER & UART_IER_THRI)) {
219 info->IER |= UART_IER_THRI;
353 info->IER &= ~UART_IER_THRI;
375 info->IER &= ~UART_IER_THRI;
430 info->IER |= UART_IER_THRI;
445 info->IER &= ~UART_IER_THRI;
464 if(info->IER
[all...]
/drivers/isdn/hisax/
H A Delsa_ser.c30 const char *ModemIn[] = {"RBR", "IER", "IIR", "LCR", "MCR", "LSR", "MSR", "SCR"};
31 const char *ModemOut[] = {"THR", "IER", "FCR", "LCR", "MCR", "LSR", "MSR", "SCR"};
130 cs->hw.elsa.IER &= ~UART_IER_MSI;
131 cs->hw.elsa.IER |= UART_IER_MSI;
132 serial_outp(cs, UART_IER, cs->hw.elsa.IER);
181 cs->hw.elsa.IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
182 serial_outp(cs, UART_IER, cs->hw.elsa.IER); /* enable interrupts */
220 cs->hw.elsa.IER = 0;
272 !(cs->hw.elsa.IER & UART_IER_THRI)) {
273 cs->hw.elsa.IER |
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/drivers/macintosh/
H A Dvia-cuda.c50 #define IER (14*RS) /* Interrupt enable register */ macro
63 /* Bits in IFR and IER */
64 #define IER_SET 0x80 /* set bits in IER */
65 #define IER_CLR 0 /* clear bits in IER */
187 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
269 out_8(&via[IER], 0x7f); /* disable interrupts from VIA */
270 (void)in_8(&via[IER]);
272 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */
H A Dvia-maciisi.c40 #define IER (14*RS) /* Interrupt enable register */ macro
53 /* Bits in IFR and IER */
54 #define IER_SET 0x80 /* set bits in IER */
55 #define IER_CLR 0 /* clear bits in IER */
150 via[IER] = IER_CLR | SR_INT;
186 via[IER] = IER_SET | SR_INT;
205 via[IER] = IER_SET | SR_INT;
H A Dvia-pmu.c94 #define IER (14*RS) /* Interrupt enable register */ macro
106 /* Bits in IFR and IER */
107 #define IER_SET 0x80 /* set bits in IER */
108 #define IER_CLR 0 /* clear bits in IER */
344 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
433 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1301 out_8(&via[IER], CB1_INT | IER_CLR);
1325 out_8(&via[IER], CB1_INT | IER_SET);
1572 intr, in_8(&via[IER]), pmu_state);
1777 out_8(&via[IER], IER_CL
[all...]
H A Dvia-macii.c56 #define IER (14*RS) /* Interrupt enable register */ macro
68 /* Bits in IFR and IER */
69 #define IER_SET 0x80 /* set bits in IER */
70 #define IER_CLR 0 /* clear bits in IER */
/drivers/clocksource/
H A Dtcb_clksrc.c121 __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
135 __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
/drivers/net/irda/
H A Dnsc-ircc.c1032 outb(IER_RXHDL_IE, iobase+IER);
1275 outb(0, iobase+IER);
1346 outb(ier, iobase+IER);
1421 outb(IER_TXLDL_IE, iobase+IER);
1534 outb(IER_TMR_IE, iobase+IER);
1544 outb(IER_DMA_IE, iobase+IER);
2110 self->ier = inb(iobase+IER);
2113 outb(0, iobase+IER); /* Disable interrupts */
2123 outb(self->ier, iobase+IER); /* Restore interrupts */
2209 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
[all...]
H A Dnsc-ircc.h79 #define IER 0x01 /* Interrupt Enable Register*/ macro
/drivers/net/hamradio/
H A Dbaycom_ser_fdx.c108 #define IER(iobase) (iobase+1) macro
447 outb(0, IER(dev->base_addr));
464 outb(0x0a, IER(dev->base_addr));
488 outb(0, IER(dev->base_addr));
H A Dbaycom_ser_hdx.c96 #define IER(iobase) (iobase+1) macro
492 outb(0, IER(dev->base_addr));
501 outb(2, IER(dev->base_addr));
524 outb(0, IER(dev->base_addr));
H A Dyam.c166 #define IER(iobase) (iobase+1) macro
308 outb(0, IER(iobase));
480 outb(0, IER(dev->base_addr));
495 outb(ENABLE_RTXINT, IER(dev->base_addr));
890 outb(0, IER(dev->base_addr));
933 outb(0, IER(dev->base_addr));
/drivers/spi/
H A Dspi-sh-msiof.c55 #define IER 0x44 macro
123 sh_msiof_write(p, IER, 0);
213 sh_msiof_write(p, IER, STR_TEOF | STR_REOF);
498 sh_msiof_write(p, IER, 0);
/drivers/usb/serial/
H A Dio_16654.h30 // the EdgePort firmware -- that includes THR, RHR, IER, FCR.
35 #define IER 1 // ! Interrupt Enable Register macro
H A Dmos7720.c133 IER, enumerator in enum:mos_regs
162 0x01, /* IER */
1057 * 1 : IER
1077 write_mos_reg(serial, port_number, IER, 0x00);
1093 write_mos_reg(serial, port_number, IER, 0x00);
1096 write_mos_reg(serial, port_number, IER, 0x0c);
1187 IER, 0x00);
1421 write_mos_reg(serial, port_number, IER, 0x00);
1675 write_mos_reg(serial, port_number, IER, 0x00);
1714 write_mos_reg(serial, port_number, IER,
[all...]
/drivers/input/touchscreen/
H A Datmel-wm97xx.c282 ac97c_writel(atmel_wm97xx, IER, AC97C_INT_CBEVT);
416 ac97c_writel(atmel_wm97xx, IER, AC97C_INT_CBEVT);
/drivers/media/common/
H A Dsaa7146_core.c408 saa7146_write(dev, IER, 0);
539 saa7146_write(dev, IER, 0);
/drivers/video/
H A Di740_reg.h229 #define IER 0x3030 macro
/drivers/video/i810/
H A Di810_regs.h44 #define IER 0x020A0 macro
/drivers/staging/serial/
H A D68360serial.c593 info->IER |= UART_IER_THRI;
594 serial_out(info, UART_IER, info->IER);
604 info->IER &= ~UART_IER_THRI;
605 serial_out(info, UART_IER, info->IER);
918 info->IER &= ~UART_IER_MSI;
920 info->IER |= UART_IER_MSI;
923 info->IER |= UART_IER_MSI;
930 info->IER |= UART_IER_MSI;
932 serial_out(info, UART_IER, info->IER);
2167 * and restore the IER
[all...]
/drivers/input/serio/
H A Dat32psif.c165 psif_writel(psif, IER, PSIF_BIT(RXRDY));
/drivers/rtc/
H A Drtc-at32ap700x.c152 rtc_writel(rtc, IER, RTC_BIT(IER_TOPI));
/drivers/gpu/drm/i915/
H A Di915_irq.c1996 I915_WRITE(IER, 0x0);
1997 POSTING_READ(IER);
2019 /* Enable in IER... */
2041 I915_WRITE(IER, enable_mask);
2042 POSTING_READ(IER);
2123 I915_WRITE(IER, 0x0);
/drivers/net/wireless/
H A Dadm8211.h29 __le32 IER; /* 0x38 CSR7 */ member in struct:adm8211_csr
177 /* CSR7 - IER (Interrupt Enable Register) */

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