1/* 2 * Copyright 2012 Sascha Hauer, Pengutronix 3 * 4 * The code contained herein is licensed under the GNU General Public 5 * License. You may obtain a copy of the GNU General Public License 6 * Version 2 or later at the following locations: 7 * 8 * http://www.opensource.org/licenses/gpl-license.html 9 * http://www.gnu.org/copyleft/gpl.html 10 */ 11 12/include/ "skeleton.dtsi" 13 14/ { 15 aliases { 16 serial0 = &uart1; 17 serial1 = &uart2; 18 serial2 = &uart3; 19 serial3 = &uart4; 20 serial4 = &uart5; 21 serial5 = &uart6; 22 }; 23 24 avic: avic-interrupt-controller@e0000000 { 25 compatible = "fsl,imx27-avic", "fsl,avic"; 26 interrupt-controller; 27 #interrupt-cells = <1>; 28 reg = <0x10040000 0x1000>; 29 }; 30 31 clocks { 32 #address-cells = <1>; 33 #size-cells = <0>; 34 35 osc26m { 36 compatible = "fsl,imx-osc26m", "fixed-clock"; 37 clock-frequency = <26000000>; 38 }; 39 }; 40 41 soc { 42 #address-cells = <1>; 43 #size-cells = <1>; 44 compatible = "simple-bus"; 45 interrupt-parent = <&avic>; 46 ranges; 47 48 aipi@10000000 { /* AIPI1 */ 49 compatible = "fsl,aipi-bus", "simple-bus"; 50 #address-cells = <1>; 51 #size-cells = <1>; 52 reg = <0x10000000 0x10000000>; 53 ranges; 54 55 wdog@10002000 { 56 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; 57 reg = <0x10002000 0x4000>; 58 interrupts = <27>; 59 status = "disabled"; 60 }; 61 62 uart1: uart@1000a000 { 63 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 64 reg = <0x1000a000 0x1000>; 65 interrupts = <20>; 66 status = "disabled"; 67 }; 68 69 uart2: uart@1000b000 { 70 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 71 reg = <0x1000b000 0x1000>; 72 interrupts = <19>; 73 status = "disabled"; 74 }; 75 76 uart3: uart@1000c000 { 77 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 78 reg = <0x1000c000 0x1000>; 79 interrupts = <18>; 80 status = "disabled"; 81 }; 82 83 uart4: uart@1000d000 { 84 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 85 reg = <0x1000d000 0x1000>; 86 interrupts = <17>; 87 status = "disabled"; 88 }; 89 90 cspi1: cspi@1000e000 { 91 #address-cells = <1>; 92 #size-cells = <0>; 93 compatible = "fsl,imx27-cspi"; 94 reg = <0x1000e000 0x1000>; 95 interrupts = <16>; 96 status = "disabled"; 97 }; 98 99 cspi2: cspi@1000f000 { 100 #address-cells = <1>; 101 #size-cells = <0>; 102 compatible = "fsl,imx27-cspi"; 103 reg = <0x1000f000 0x1000>; 104 interrupts = <15>; 105 status = "disabled"; 106 }; 107 108 i2c1: i2c@10012000 { 109 #address-cells = <1>; 110 #size-cells = <0>; 111 compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; 112 reg = <0x10012000 0x1000>; 113 interrupts = <12>; 114 status = "disabled"; 115 }; 116 117 gpio1: gpio@10015000 { 118 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 119 reg = <0x10015000 0x100>; 120 interrupts = <8>; 121 gpio-controller; 122 #gpio-cells = <2>; 123 interrupt-controller; 124 #interrupt-cells = <1>; 125 }; 126 127 gpio2: gpio@10015100 { 128 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 129 reg = <0x10015100 0x100>; 130 interrupts = <8>; 131 gpio-controller; 132 #gpio-cells = <2>; 133 interrupt-controller; 134 #interrupt-cells = <1>; 135 }; 136 137 gpio3: gpio@10015200 { 138 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 139 reg = <0x10015200 0x100>; 140 interrupts = <8>; 141 gpio-controller; 142 #gpio-cells = <2>; 143 interrupt-controller; 144 #interrupt-cells = <1>; 145 }; 146 147 gpio4: gpio@10015300 { 148 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 149 reg = <0x10015300 0x100>; 150 interrupts = <8>; 151 gpio-controller; 152 #gpio-cells = <2>; 153 interrupt-controller; 154 #interrupt-cells = <1>; 155 }; 156 157 gpio5: gpio@10015400 { 158 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 159 reg = <0x10015400 0x100>; 160 interrupts = <8>; 161 gpio-controller; 162 #gpio-cells = <2>; 163 interrupt-controller; 164 #interrupt-cells = <1>; 165 }; 166 167 gpio6: gpio@10015500 { 168 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; 169 reg = <0x10015500 0x100>; 170 interrupts = <8>; 171 gpio-controller; 172 #gpio-cells = <2>; 173 interrupt-controller; 174 #interrupt-cells = <1>; 175 }; 176 177 cspi3: cspi@10017000 { 178 #address-cells = <1>; 179 #size-cells = <0>; 180 compatible = "fsl,imx27-cspi"; 181 reg = <0x10017000 0x1000>; 182 interrupts = <6>; 183 status = "disabled"; 184 }; 185 186 uart5: uart@1001b000 { 187 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 188 reg = <0x1001b000 0x1000>; 189 interrupts = <49>; 190 status = "disabled"; 191 }; 192 193 uart6: uart@1001c000 { 194 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 195 reg = <0x1001c000 0x1000>; 196 interrupts = <48>; 197 status = "disabled"; 198 }; 199 200 i2c2: i2c@1001d000 { 201 #address-cells = <1>; 202 #size-cells = <0>; 203 compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; 204 reg = <0x1001d000 0x1000>; 205 interrupts = <1>; 206 status = "disabled"; 207 }; 208 209 fec: fec@1002b000 { 210 compatible = "fsl,imx27-fec"; 211 reg = <0x1002b000 0x4000>; 212 interrupts = <50>; 213 status = "disabled"; 214 }; 215 }; 216 }; 217}; 218