196f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz/* 296f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz * Blackfin core register bit & address definitions 396f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz * 496f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz * Copyright 2005-2008 Analog Devices Inc. 596f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz * 696f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz * Licensed under the ADI BSD license or GPL-2 (or later). 796f1050d3df105c9ae6c6ac224f370199ea82fcdRobin Getz */ 81394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 91394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#ifndef _DEF_LPBLACKFIN_H 101394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define _DEF_LPBLACKFIN_H 111394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 12639f6571458948b5112be2cf00c0c2c04db2897dBryan Wu#include <mach/anomaly.h> 131394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 141394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define MK_BMSK_(x) (1<<x) 153630ac34b0ab346ff0910401dbed7af624be7027Mike Frysinger#define BFIN_DEPOSIT(mask, x) (((x) << __ffs(mask)) & (mask)) 163630ac34b0ab346ff0910401dbed7af624be7027Mike Frysinger#define BFIN_EXTRACT(mask, x) (((x) & (mask)) >> __ffs(mask)) 171394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 181aafd9091226a02b481298315f959f777294684eMike Frysinger#ifndef __ASSEMBLY__ 191394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 201aafd9091226a02b481298315f959f777294684eMike Frysinger#include <linux/types.h> 211394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 221aafd9091226a02b481298315f959f777294684eMike Frysinger#if ANOMALY_05000198 231aafd9091226a02b481298315f959f777294684eMike Frysinger# define NOP_PAD_ANOMALY_05000198 "nop;" 241394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#else 251aafd9091226a02b481298315f959f777294684eMike Frysinger# define NOP_PAD_ANOMALY_05000198 261394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#endif 271394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 2869e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger#define _bfin_readX(addr, size, asm_size, asm_ext) ({ \ 2969e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger u32 __v; \ 301aafd9091226a02b481298315f959f777294684eMike Frysinger __asm__ __volatile__( \ 311aafd9091226a02b481298315f959f777294684eMike Frysinger NOP_PAD_ANOMALY_05000198 \ 3269e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger "%0 = " #asm_size "[%1]" #asm_ext ";" \ 331aafd9091226a02b481298315f959f777294684eMike Frysinger : "=d" (__v) \ 341aafd9091226a02b481298315f959f777294684eMike Frysinger : "a" (addr) \ 351aafd9091226a02b481298315f959f777294684eMike Frysinger ); \ 361aafd9091226a02b481298315f959f777294684eMike Frysinger __v; }) 3769e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger#define _bfin_writeX(addr, val, size, asm_size) \ 381aafd9091226a02b481298315f959f777294684eMike Frysinger __asm__ __volatile__( \ 391aafd9091226a02b481298315f959f777294684eMike Frysinger NOP_PAD_ANOMALY_05000198 \ 4069e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger #asm_size "[%0] = %1;" \ 411aafd9091226a02b481298315f959f777294684eMike Frysinger : \ 4269e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger : "a" (addr), "d" ((u##size)(val)) \ 431aafd9091226a02b481298315f959f777294684eMike Frysinger : "memory" \ 441aafd9091226a02b481298315f959f777294684eMike Frysinger ) 451aafd9091226a02b481298315f959f777294684eMike Frysinger 4669e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger#define bfin_read8(addr) _bfin_readX(addr, 8, b, (z)) 4769e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger#define bfin_read16(addr) _bfin_readX(addr, 16, w, (z)) 4869e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger#define bfin_read32(addr) _bfin_readX(addr, 32, , ) 4969e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger#define bfin_write8(addr, val) _bfin_writeX(addr, val, 8, b) 5069e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger#define bfin_write16(addr, val) _bfin_writeX(addr, val, 16, w) 5169e1d8a61d5aa9e03676dc21fdfb750c5a97bb34Mike Frysinger#define bfin_write32(addr, val) _bfin_writeX(addr, val, 32, ) 521aafd9091226a02b481298315f959f777294684eMike Frysinger 53f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger#define bfin_read(addr) \ 54f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger({ \ 55d763c58a886068f1ec43751893b5aec35fc072e3Mike Frysinger sizeof(*(addr)) == 1 ? bfin_read8(addr) : \ 56d763c58a886068f1ec43751893b5aec35fc072e3Mike Frysinger sizeof(*(addr)) == 2 ? bfin_read16(addr) : \ 57d763c58a886068f1ec43751893b5aec35fc072e3Mike Frysinger sizeof(*(addr)) == 4 ? bfin_read32(addr) : \ 58d763c58a886068f1ec43751893b5aec35fc072e3Mike Frysinger ({ BUG(); 0; }); \ 59f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger}) 60f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger#define bfin_write(addr, val) \ 61b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysingerdo { \ 62f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger switch (sizeof(*(addr))) { \ 63f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger case 1: bfin_write8(addr, val); break; \ 64f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger case 2: bfin_write16(addr, val); break; \ 65f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger case 4: bfin_write32(addr, val); break; \ 66f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger default: BUG(); \ 67f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger } \ 68b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysinger} while (0) 69b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysinger 70b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysinger#define bfin_write_or(addr, bits) \ 71b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysingerdo { \ 727a7a430f7498cd55820232d8e3f144161138f91aMike Frysinger typeof(addr) __addr = (addr); \ 73b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysinger bfin_write(__addr, bfin_read(__addr) | (bits)); \ 74b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysinger} while (0) 75b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysinger 76b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysinger#define bfin_write_and(addr, bits) \ 77b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysingerdo { \ 787a7a430f7498cd55820232d8e3f144161138f91aMike Frysinger typeof(addr) __addr = (addr); \ 79b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysinger bfin_write(__addr, bfin_read(__addr) & (bits)); \ 80b5fc12df9039a9e6a2c5ae1fc0cee244b6aca8e2Mike Frysinger} while (0) 81f2521ce9ce84d1f10016a8fc91108ef9d3b14d2bMike Frysinger 821aafd9091226a02b481298315f959f777294684eMike Frysinger#endif /* __ASSEMBLY__ */ 831aafd9091226a02b481298315f959f777294684eMike Frysinger 841394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/************************************************** 851394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * System Register Bits 861394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu **************************************************/ 871394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 881394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/************************************************** 891394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * ASTAT register 901394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu **************************************************/ 911394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 921394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* definitions of ASTAT bit positions*/ 931394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 941394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 or shifter operation is zero*/ 951394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AZ_P 0x00000000 961394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 or shifter operation is negative*/ 971394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AN_P 0x00000001 981394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Condition Code, used for holding comparison results*/ 991394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_CC_P 0x00000005 1001394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Quotient Bit*/ 1011394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AQ_P 0x00000006 1021394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Rounding mode, set for biased, clear for unbiased*/ 1031394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_RND_MOD_P 0x00000008 1041394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 operation generated a carry*/ 1051394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AC0_P 0x0000000C 1061394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 operation generated a carry*/ 1071394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AC0_COPY_P 0x00000002 1081394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU1 operation generated a carry*/ 1091394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AC1_P 0x0000000D 1101394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 or MAC0 operation overflowed, sticky for MAC*/ 1111394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AV0_P 0x00000010 1121394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Sticky version of ASTAT_AV0 */ 1131394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AV0S_P 0x00000011 1141394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last MAC1 operation overflowed, sticky for MAC*/ 1151394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AV1_P 0x00000012 1161394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Sticky version of ASTAT_AV1 */ 1171394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AV1S_P 0x00000013 1181394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 or MAC0 operation overflowed*/ 1191394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_V_P 0x00000018 1201394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 or MAC0 operation overflowed*/ 1211394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_V_COPY_P 0x00000003 1221394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Sticky version of ASTAT_V*/ 1231394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_VS_P 0x00000019 1241394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 1251394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Masks */ 1261394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 1271394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 or shifter operation is zero*/ 1281394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AZ MK_BMSK_(ASTAT_AZ_P) 1291394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 or shifter operation is negative*/ 1301394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AN MK_BMSK_(ASTAT_AN_P) 1311394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 operation generated a carry*/ 1321394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AC0 MK_BMSK_(ASTAT_AC0_P) 1331394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 operation generated a carry*/ 1341394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AC0_COPY MK_BMSK_(ASTAT_AC0_COPY_P) 1351394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 operation generated a carry*/ 1361394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AC1 MK_BMSK_(ASTAT_AC1_P) 1371394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last ALU0 or MAC0 operation overflowed, sticky for MAC*/ 1381394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AV0 MK_BMSK_(ASTAT_AV0_P) 1391394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Result of last MAC1 operation overflowed, sticky for MAC*/ 1401394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AV1 MK_BMSK_(ASTAT_AV1_P) 1411394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Condition Code, used for holding comparison results*/ 1421394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_CC MK_BMSK_(ASTAT_CC_P) 1431394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Quotient Bit*/ 1441394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_AQ MK_BMSK_(ASTAT_AQ_P) 1451394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Rounding mode, set for biased, clear for unbiased*/ 1461394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_RND_MOD MK_BMSK_(ASTAT_RND_MOD_P) 1471394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Overflow Bit*/ 1481394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_V MK_BMSK_(ASTAT_V_P) 1491394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/*Overflow Bit*/ 1501394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASTAT_V_COPY MK_BMSK_(ASTAT_V_COPY_P) 1511394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 1521394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/************************************************** 1531394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * SEQSTAT register 1541394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu **************************************************/ 1551394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 1561394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Bit Positions */ 1571394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_EXCAUSE0_P 0x00000000 /* Last exception cause bit 0 */ 1581394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_EXCAUSE1_P 0x00000001 /* Last exception cause bit 1 */ 1591394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_EXCAUSE2_P 0x00000002 /* Last exception cause bit 2 */ 1601394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_EXCAUSE3_P 0x00000003 /* Last exception cause bit 3 */ 1611394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_EXCAUSE4_P 0x00000004 /* Last exception cause bit 4 */ 1621394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_EXCAUSE5_P 0x00000005 /* Last exception cause bit 5 */ 1631394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_IDLE_REQ_P 0x0000000C /* Pending idle mode request, 1641394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * set by IDLE instruction. 1651394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 1661394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_SFTRESET_P 0x0000000D /* Indicates whether the last 1671394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * reset was a software reset 1681394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * (=1) 1691394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 1701394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE0_P 0x0000000E /* Last hw error cause bit 0 */ 1711394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE1_P 0x0000000F /* Last hw error cause bit 1 */ 1721394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE2_P 0x00000010 /* Last hw error cause bit 2 */ 1731394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE3_P 0x00000011 /* Last hw error cause bit 3 */ 1741394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE4_P 0x00000012 /* Last hw error cause bit 4 */ 1751394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Masks */ 1761394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Exception cause */ 1771394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_EXCAUSE (MK_BMSK_(SEQSTAT_EXCAUSE0_P) | \ 1781394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu MK_BMSK_(SEQSTAT_EXCAUSE1_P) | \ 1791394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu MK_BMSK_(SEQSTAT_EXCAUSE2_P) | \ 1801394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu MK_BMSK_(SEQSTAT_EXCAUSE3_P) | \ 1811394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu MK_BMSK_(SEQSTAT_EXCAUSE4_P) | \ 1821394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu MK_BMSK_(SEQSTAT_EXCAUSE5_P) | \ 1831394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 0) 1841394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 1851394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Indicates whether the last reset was a software reset (=1) */ 1861394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_SFTRESET (MK_BMSK_(SEQSTAT_SFTRESET_P)) 1871394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 1881394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Last hw error cause */ 1891394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE (MK_BMSK_(SEQSTAT_HWERRCAUSE0_P) | \ 1901394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu MK_BMSK_(SEQSTAT_HWERRCAUSE1_P) | \ 1911394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu MK_BMSK_(SEQSTAT_HWERRCAUSE2_P) | \ 1921394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu MK_BMSK_(SEQSTAT_HWERRCAUSE3_P) | \ 1931394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu MK_BMSK_(SEQSTAT_HWERRCAUSE4_P) | \ 1941394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 0) 1951394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 1961394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Translate bits to something useful */ 1971394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 1981394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Last hw error cause */ 1991394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE_SHIFT (14) 2001394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE_SYSTEM_MMR (0x02 << SEQSTAT_HWERRCAUSE_SHIFT) 2011394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE_EXTERN_ADDR (0x03 << SEQSTAT_HWERRCAUSE_SHIFT) 2021394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE_PERF_FLOW (0x12 << SEQSTAT_HWERRCAUSE_SHIFT) 2031394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SEQSTAT_HWERRCAUSE_RAISE_5 (0x18 << SEQSTAT_HWERRCAUSE_SHIFT) 2041394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 2051394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/************************************************** 2061394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * SYSCFG register 2071394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu **************************************************/ 2081394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 2091394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Bit Positions */ 2101394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SYSCFG_SSSTEP_P 0x00000000 /* Supervisor single step, when 2111394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * set it forces an exception 2121394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * for each instruction executed 2131394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2141394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SYSCFG_CCEN_P 0x00000001 /* Enable cycle counter (=1) */ 2151394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SYSCFG_SNEN_P 0x00000002 /* Self nesting Interrupt Enable */ 2161394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 2171394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Masks */ 2181394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 2191394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Supervisor single step, when set it forces an exception for each 2201394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu *instruction executed 2211394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2221394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SYSCFG_SSSTEP MK_BMSK_(SYSCFG_SSSTEP_P ) 2231394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Enable cycle counter (=1) */ 2241394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SYSCFG_CCEN MK_BMSK_(SYSCFG_CCEN_P ) 2251394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Self Nesting Interrupt Enable */ 2261394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SYSCFG_SNEN MK_BMSK_(SYSCFG_SNEN_P) 2271394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Backward-compatibility for typos in prior releases */ 2281394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SYSCFG_SSSSTEP SYSCFG_SSSTEP 2291394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SYSCFG_CCCEN SYSCFG_CCEN 2301394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 2311394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/**************************************************** 2321394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Core MMR Register Map 2331394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu ****************************************************/ 2341394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 2351394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Data Cache & SRAM Memory (0xFFE00000 - 0xFFE00404) */ 2361394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 2371394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define SRAM_BASE_ADDRESS 0xFFE00000 /* SRAM Base Address Register */ 2381394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DMEM_CONTROL 0xFFE00004 /* Data memory control */ 2391394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_STATUS 0xFFE00008 /* Data Cache Programmable Look-Aside 2401394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Buffer Status 2411394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2421394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_FAULT_STATUS 0xFFE00008 /* "" (older define) */ 2431394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_FAULT_ADDR 0xFFE0000C /* Data Cache Programmable Look-Aside 2441394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Buffer Fault Address 2451394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2461394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR0 0xFFE00100 /* Data Cache Protection Lookaside 2471394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Buffer 0 2481394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2491394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR1 0xFFE00104 /* Data Cache Protection Lookaside 2501394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Buffer 1 2511394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2521394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR2 0xFFE00108 /* Data Cache Protection Lookaside 2531394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Buffer 2 2541394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2551394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR3 0xFFE0010C /* Data Cacheability Protection 2561394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 3 2571394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2581394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR4 0xFFE00110 /* Data Cacheability Protection 2591394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 4 2601394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2611394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR5 0xFFE00114 /* Data Cacheability Protection 2621394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 5 2631394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2641394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR6 0xFFE00118 /* Data Cacheability Protection 2651394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 6 2661394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2671394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR7 0xFFE0011C /* Data Cacheability Protection 2681394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 7 2691394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2701394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR8 0xFFE00120 /* Data Cacheability Protection 2711394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 8 2721394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2731394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR9 0xFFE00124 /* Data Cacheability Protection 2741394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 9 2751394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2761394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR10 0xFFE00128 /* Data Cacheability Protection 2771394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 10 2781394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2791394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR11 0xFFE0012C /* Data Cacheability Protection 2801394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 11 2811394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2821394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR12 0xFFE00130 /* Data Cacheability Protection 2831394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 12 2841394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2851394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR13 0xFFE00134 /* Data Cacheability Protection 2861394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 13 2871394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2881394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR14 0xFFE00138 /* Data Cacheability Protection 2891394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 14 2901394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2911394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_ADDR15 0xFFE0013C /* Data Cacheability Protection 2921394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Lookaside Buffer 15 2931394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 2941394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA0 0xFFE00200 /* Data Cache 0 Status */ 2951394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA1 0xFFE00204 /* Data Cache 1 Status */ 2961394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA2 0xFFE00208 /* Data Cache 2 Status */ 2971394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA3 0xFFE0020C /* Data Cache 3 Status */ 2981394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA4 0xFFE00210 /* Data Cache 4 Status */ 2991394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA5 0xFFE00214 /* Data Cache 5 Status */ 3001394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA6 0xFFE00218 /* Data Cache 6 Status */ 3011394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA7 0xFFE0021C /* Data Cache 7 Status */ 3021394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA8 0xFFE00220 /* Data Cache 8 Status */ 3031394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA9 0xFFE00224 /* Data Cache 9 Status */ 3041394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA10 0xFFE00228 /* Data Cache 10 Status */ 3051394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA11 0xFFE0022C /* Data Cache 11 Status */ 3061394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA12 0xFFE00230 /* Data Cache 12 Status */ 3071394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA13 0xFFE00234 /* Data Cache 13 Status */ 3081394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA14 0xFFE00238 /* Data Cache 14 Status */ 3091394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA15 0xFFE0023C /* Data Cache 15 Status */ 3101394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCPLB_DATA16 0xFFE00240 /* Extra Dummy entry */ 3111394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 3121394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DTEST_COMMAND 0xFFE00300 /* Data Test Command Register */ 3131394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DTEST_DATA0 0xFFE00400 /* Data Test Data Register */ 3141394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DTEST_DATA1 0xFFE00404 /* Data Test Data Register */ 3151394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 3161394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Instruction Cache & SRAM Memory (0xFFE01004 - 0xFFE01404) */ 3171394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 3181394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define IMEM_CONTROL 0xFFE01004 /* Instruction Memory Control */ 3191394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_STATUS 0xFFE01008 /* Instruction Cache miss status */ 3201394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CODE_FAULT_STATUS 0xFFE01008 /* "" (older define) */ 3211394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_FAULT_ADDR 0xFFE0100C /* Instruction Cache miss address */ 3221394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CODE_FAULT_ADDR 0xFFE0100C /* "" (older define) */ 3231394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR0 0xFFE01100 /* Instruction Cacheability 3241394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 0 3251394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3261394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR1 0xFFE01104 /* Instruction Cacheability 3271394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 1 3281394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3291394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR2 0xFFE01108 /* Instruction Cacheability 3301394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 2 3311394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3321394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR3 0xFFE0110C /* Instruction Cacheability 3331394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 3 3341394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3351394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR4 0xFFE01110 /* Instruction Cacheability 3361394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 4 3371394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3381394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR5 0xFFE01114 /* Instruction Cacheability 3391394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 5 3401394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3411394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR6 0xFFE01118 /* Instruction Cacheability 3421394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 6 3431394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3441394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR7 0xFFE0111C /* Instruction Cacheability 3451394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 7 3461394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3471394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR8 0xFFE01120 /* Instruction Cacheability 3481394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 8 3491394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3501394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR9 0xFFE01124 /* Instruction Cacheability 3511394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 9 3521394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3531394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR10 0xFFE01128 /* Instruction Cacheability 3541394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 10 3551394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3561394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR11 0xFFE0112C /* Instruction Cacheability 3571394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 11 3581394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3591394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR12 0xFFE01130 /* Instruction Cacheability 3601394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 12 3611394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3621394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR13 0xFFE01134 /* Instruction Cacheability 3631394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 13 3641394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3651394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR14 0xFFE01138 /* Instruction Cacheability 3661394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 14 3671394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3681394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_ADDR15 0xFFE0113C /* Instruction Cacheability 3691394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Protection Lookaside Buffer 15 3701394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 3711394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA0 0xFFE01200 /* Instruction Cache 0 Status */ 3721394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA1 0xFFE01204 /* Instruction Cache 1 Status */ 3731394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA2 0xFFE01208 /* Instruction Cache 2 Status */ 3741394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA3 0xFFE0120C /* Instruction Cache 3 Status */ 3751394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA4 0xFFE01210 /* Instruction Cache 4 Status */ 3761394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA5 0xFFE01214 /* Instruction Cache 5 Status */ 3771394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA6 0xFFE01218 /* Instruction Cache 6 Status */ 3781394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA7 0xFFE0121C /* Instruction Cache 7 Status */ 3791394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA8 0xFFE01220 /* Instruction Cache 8 Status */ 3801394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA9 0xFFE01224 /* Instruction Cache 9 Status */ 3811394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA10 0xFFE01228 /* Instruction Cache 10 Status */ 3821394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA11 0xFFE0122C /* Instruction Cache 11 Status */ 3831394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA12 0xFFE01230 /* Instruction Cache 12 Status */ 3841394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA13 0xFFE01234 /* Instruction Cache 13 Status */ 3851394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA14 0xFFE01238 /* Instruction Cache 14 Status */ 3861394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ICPLB_DATA15 0xFFE0123C /* Instruction Cache 15 Status */ 3871394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ITEST_COMMAND 0xFFE01300 /* Instruction Test Command Register */ 3881394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ITEST_DATA0 0xFFE01400 /* Instruction Test Data Register */ 3891394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ITEST_DATA1 0xFFE01404 /* Instruction Test Data Register */ 3901394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 3911394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Event/Interrupt Controller Registers (0xFFE02000 - 0xFFE02110) */ 3921394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 3931394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT0 0xFFE02000 /* Event Vector 0 ESR Address */ 3941394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT1 0xFFE02004 /* Event Vector 1 ESR Address */ 3951394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT2 0xFFE02008 /* Event Vector 2 ESR Address */ 3961394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT3 0xFFE0200C /* Event Vector 3 ESR Address */ 3971394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT4 0xFFE02010 /* Event Vector 4 ESR Address */ 3981394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT5 0xFFE02014 /* Event Vector 5 ESR Address */ 3991394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT6 0xFFE02018 /* Event Vector 6 ESR Address */ 4001394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT7 0xFFE0201C /* Event Vector 7 ESR Address */ 4011394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT8 0xFFE02020 /* Event Vector 8 ESR Address */ 4021394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT9 0xFFE02024 /* Event Vector 9 ESR Address */ 4031394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT10 0xFFE02028 /* Event Vector 10 ESR Address */ 4041394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT11 0xFFE0202C /* Event Vector 11 ESR Address */ 4051394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT12 0xFFE02030 /* Event Vector 12 ESR Address */ 4061394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT13 0xFFE02034 /* Event Vector 13 ESR Address */ 4071394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT14 0xFFE02038 /* Event Vector 14 ESR Address */ 4081394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT15 0xFFE0203C /* Event Vector 15 ESR Address */ 409ada091729e8737edc3d455681fda9f745cfd2b63Mike Frysinger#define EVT_OVERRIDE 0xFFE02100 /* Event Vector Override Register */ 4101394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define IMASK 0xFFE02104 /* Interrupt Mask Register */ 4111394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define IPEND 0xFFE02108 /* Interrupt Pending Register */ 4121394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ILAT 0xFFE0210C /* Interrupt Latch Register */ 4131394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define IPRIO 0xFFE02110 /* Core Interrupt Priority Register */ 4141394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4151394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Core Timer Registers (0xFFE03000 - 0xFFE0300C) */ 4161394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4171394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TCNTL 0xFFE03000 /* Core Timer Control Register */ 4181394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TPERIOD 0xFFE03004 /* Core Timer Period Register */ 4191394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TSCALE 0xFFE03008 /* Core Timer Scale Register */ 4201394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TCOUNT 0xFFE0300C /* Core Timer Count Register */ 4211394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4221394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Debug/MP/Emulation Registers (0xFFE05000 - 0xFFE05008) */ 4231394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DSPID 0xFFE05000 /* DSP Processor ID Register for 4241394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * MP implementations 4251394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 4261394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4271394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DBGSTAT 0xFFE05008 /* Debug Status Register */ 4281394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4291394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Trace Buffer Registers (0xFFE06000 - 0xFFE06100) */ 4301394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4311394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ 4321394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ 4331394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUF 0xFFE06100 /* Trace Buffer */ 4341394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4351394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Control Registers (0xFFE07000 - 0xFFE07200) */ 4361394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4371394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Control Register */ 4381394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIACTL 0xFFE07000 4391394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Register 0 */ 4401394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIA0 0xFFE07040 4411394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Register 1 */ 4421394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIA1 0xFFE07044 4431394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Register 2 */ 4441394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIA2 0xFFE07048 4451394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Register 3 */ 4461394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIA3 0xFFE0704C 4471394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Register 4 */ 4481394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIA4 0xFFE07050 4491394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Register 5 */ 4501394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIA5 0xFFE07054 4511394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Count Register 0 */ 4521394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIACNT0 0xFFE07080 4531394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Count Register 1 */ 4541394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIACNT1 0xFFE07084 4551394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Count Register 2 */ 4561394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIACNT2 0xFFE07088 4571394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Count Register 3 */ 4581394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIACNT3 0xFFE0708C 4591394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Count Register 4 */ 4601394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIACNT4 0xFFE07090 4611394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Instruction Address Count Register 5 */ 4621394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPIACNT5 0xFFE07094 4631394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Data Address Control Register */ 4641394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPDACTL 0xFFE07100 4651394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Data Address Register 0 */ 4661394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPDA0 0xFFE07140 4671394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Data Address Register 1 */ 4681394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPDA1 0xFFE07144 4691394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Data Address Count Value Register 0 */ 4701394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPDACNT0 0xFFE07180 4711394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Data Address Count Value Register 1 */ 4721394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPDACNT1 0xFFE07184 4731394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Watchpoint Status Register */ 4741394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define WPSTAT 0xFFE07200 4751394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4761394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Performance Monitor Registers (0xFFE08000 - 0xFFE08104) */ 4771394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4781394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Performance Monitor Control Register */ 4791394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PFCTL 0xFFE08000 4801394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Performance Monitor Counter Register 0 */ 4811394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PFCNTR0 0xFFE08100 4821394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Performance Monitor Counter Register 1 */ 4831394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PFCNTR1 0xFFE08104 4841394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4851394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/**************************************************** 4861394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Core MMR Register Bits 4871394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu ****************************************************/ 4881394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4891394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/************************************************** 4901394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * EVT registers (ILAT, IMASK, and IPEND). 4911394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu **************************************************/ 4921394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 4931394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Bit Positions */ 4941394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_EMU_P 0x00000000 /* Emulator interrupt bit position */ 4951394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_RST_P 0x00000001 /* Reset interrupt bit position */ 4961394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_NMI_P 0x00000002 /* Non Maskable interrupt bit position */ 4971394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_EVX_P 0x00000003 /* Exception bit position */ 4981394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IRPTEN_P 0x00000004 /* Global interrupt enable bit position */ 4991394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVHW_P 0x00000005 /* Hardware Error interrupt bit position */ 5001394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVTMR_P 0x00000006 /* Timer interrupt bit position */ 5011394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG7_P 0x00000007 /* IVG7 interrupt bit position */ 5021394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG8_P 0x00000008 /* IVG8 interrupt bit position */ 5031394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG9_P 0x00000009 /* IVG9 interrupt bit position */ 5041394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG10_P 0x0000000a /* IVG10 interrupt bit position */ 5051394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG11_P 0x0000000b /* IVG11 interrupt bit position */ 5061394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG12_P 0x0000000c /* IVG12 interrupt bit position */ 5071394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG13_P 0x0000000d /* IVG13 interrupt bit position */ 5081394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG14_P 0x0000000e /* IVG14 interrupt bit position */ 5091394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG15_P 0x0000000f /* IVG15 interrupt bit position */ 5101394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 5111394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Masks */ 5121394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_EMU MK_BMSK_(EVT_EMU_P ) /* Emulator interrupt mask */ 5131394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_RST MK_BMSK_(EVT_RST_P ) /* Reset interrupt mask */ 5141394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_NMI MK_BMSK_(EVT_NMI_P ) /* Non Maskable interrupt mask */ 5151394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_EVX MK_BMSK_(EVT_EVX_P ) /* Exception mask */ 5161394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IRPTEN MK_BMSK_(EVT_IRPTEN_P) /* Global interrupt enable mask */ 5171394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVHW MK_BMSK_(EVT_IVHW_P ) /* Hardware Error interrupt mask */ 5181394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVTMR MK_BMSK_(EVT_IVTMR_P ) /* Timer interrupt mask */ 5191394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG7 MK_BMSK_(EVT_IVG7_P ) /* IVG7 interrupt mask */ 5201394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG8 MK_BMSK_(EVT_IVG8_P ) /* IVG8 interrupt mask */ 5211394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG9 MK_BMSK_(EVT_IVG9_P ) /* IVG9 interrupt mask */ 5221394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG10 MK_BMSK_(EVT_IVG10_P ) /* IVG10 interrupt mask */ 5231394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG11 MK_BMSK_(EVT_IVG11_P ) /* IVG11 interrupt mask */ 5241394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG12 MK_BMSK_(EVT_IVG12_P ) /* IVG12 interrupt mask */ 5251394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG13 MK_BMSK_(EVT_IVG13_P ) /* IVG13 interrupt mask */ 5261394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG14 MK_BMSK_(EVT_IVG14_P ) /* IVG14 interrupt mask */ 5271394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define EVT_IVG15 MK_BMSK_(EVT_IVG15_P ) /* IVG15 interrupt mask */ 5281394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 5291394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/************************************************** 5301394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * DMEM_CONTROL Register 5311394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu **************************************************/ 5321394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Bit Positions */ 5331394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ENDM_P 0x00 /* (doesn't really exist) Enable 5341394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu *Data Memory L1 5351394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 5361394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DMCTL_ENDM_P ENDM_P /* "" (older define) */ 5371394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 5381394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ENDCPLB_P 0x01 /* Enable DCPLBS */ 5391394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DMCTL_ENDCPLB_P ENDCPLB_P /* "" (older define) */ 5401394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DMC0_P 0x02 /* L1 Data Memory Configure bit 0 */ 5411394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DMCTL_DMC0_P DMC0_P /* "" (older define) */ 5421394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DMC1_P 0x03 /* L1 Data Memory Configure bit 1 */ 5431394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DMCTL_DMC1_P DMC1_P /* "" (older define) */ 5441394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCBS_P 0x04 /* L1 Data Cache Bank Select */ 5451394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PORT_PREF0_P 0x12 /* DAG0 Port Preference */ 5461394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PORT_PREF1_P 0x13 /* DAG1 Port Preference */ 5471394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 5481394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Masks */ 5491394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ENDM 0x00000001 /* (doesn't really exist) Enable 5501394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Data Memory L1 5511394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 5521394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ENDCPLB 0x00000002 /* Enable DCPLB */ 5531394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ASRAM_BSRAM 0x00000000 5541394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ACACHE_BSRAM 0x00000008 5551394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ACACHE_BCACHE 0x0000000C 5561394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define DCBS 0x00000010 /* L1 Data Cache Bank Select */ 5571394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PORT_PREF0 0x00001000 /* DAG0 Port Preference */ 5581394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PORT_PREF1 0x00002000 /* DAG1 Port Preference */ 5591394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 5601394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* IMEM_CONTROL Register */ 5611394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Bit Positions */ 5621394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ENIM_P 0x00 /* Enable L1 Code Memory */ 5631394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define IMCTL_ENIM_P 0x00 /* "" (older define) */ 5641394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ENICPLB_P 0x01 /* Enable ICPLB */ 5651394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define IMCTL_ENICPLB_P 0x01 /* "" (older define) */ 5661394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define IMC_P 0x02 /* Enable */ 5671394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define IMCTL_IMC_P 0x02 /* Configure L1 code memory as 5681394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * cache (0=SRAM) 5691394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 5701394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ILOC0_P 0x03 /* Lock Way 0 */ 5711394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ILOC1_P 0x04 /* Lock Way 1 */ 5721394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ILOC2_P 0x05 /* Lock Way 2 */ 5731394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ILOC3_P 0x06 /* Lock Way 3 */ 5741394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define LRUPRIORST_P 0x0D /* Least Recently Used Replacement 5751394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Priority 5761394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 5771394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Masks */ 5781394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ENIM 0x00000001 /* Enable L1 Code Memory */ 5791394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ENICPLB 0x00000002 /* Enable ICPLB */ 5801394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define IMC 0x00000004 /* Configure L1 code memory as 5811394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * cache (0=SRAM) 5821394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 5831394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ILOC0 0x00000008 /* Lock Way 0 */ 5841394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ILOC1 0x00000010 /* Lock Way 1 */ 5851394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ILOC2 0x00000020 /* Lock Way 2 */ 5861394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define ILOC3 0x00000040 /* Lock Way 3 */ 5871394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define LRUPRIORST 0x00002000 /* Least Recently Used Replacement 5881394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * Priority 5891394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 5901394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 5911394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* TCNTL Masks */ 5921394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TMPWR 0x00000001 /* Timer Low Power Control, 5931394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * 0=low power mode, 1=active state 5941394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 5951394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TMREN 0x00000002 /* Timer enable, 0=disable, 1=enable */ 5961394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TAUTORLD 0x00000004 /* Timer auto reload */ 5971394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TINT 0x00000008 /* Timer generated interrupt 0=no 5981394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * interrupt has been generated, 5991394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * 1=interrupt has been generated 6001394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * (sticky) 6011394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6021394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 6031394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* DCPLB_DATA and ICPLB_DATA Registers */ 6041394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Bit Positions */ 6051394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_VALID_P 0x00000000 /* 0=invalid entry, 1=valid entry */ 6061394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_LOCK_P 0x00000001 /* 0=entry may be replaced, 1=entry 6071394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * locked 6081394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6091394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_USER_RD_P 0x00000002 /* 0=no read access, 1=read access 6101394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * allowed (user mode) 6111394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6121394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Masks */ 6131394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_VALID 0x00000001 /* 0=invalid entry, 1=valid entry */ 6141394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_LOCK 0x00000002 /* 0=entry may be replaced, 1=entry 6151394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * locked 6161394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6171394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_USER_RD 0x00000004 /* 0=no read access, 1=read access 6181394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * allowed (user mode) 6191394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6203bebca2d20796dd3dc62c5d3e74148087c7ce5bdRobin Getz 6211394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PAGE_SIZE_1KB 0x00000000 /* 1 KB page size */ 6221394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PAGE_SIZE_4KB 0x00010000 /* 4 KB page size */ 6231394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PAGE_SIZE_1MB 0x00020000 /* 1 MB page size */ 6241394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define PAGE_SIZE_4MB 0x00030000 /* 4 MB page size */ 6251394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_L1SRAM 0x00000020 /* 0=SRAM mapped in L1, 0=SRAM not 6261394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * mapped to L1 6271394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6281394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_PORTPRIO 0x00000200 /* 0=low priority port, 1= high 6291394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * priority port 6301394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6311394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_L1_CHBL 0x00001000 /* 0=non-cacheable in L1, 1=cacheable 6321394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * in L1 6331394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6341394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* ICPLB_DATA only */ 6351394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_LRUPRIO 0x00000100 /* 0=can be replaced by any line, 6361394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * 1=priority for non-replacement 6371394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6381394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* DCPLB_DATA only */ 6391394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_USER_WR 0x00000008 /* 0=no write access, 0=write 6401394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * access allowed (user mode) 6411394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6421394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_SUPV_WR 0x00000010 /* 0=no write access, 0=write 6431394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * access allowed (supervisor mode) 6441394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6451394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_DIRTY 0x00000080 /* 1=dirty, 0=clean */ 6461394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_L1_AOW 0x00008000 /* 0=do not allocate cache lines on 6471394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * write-through writes, 6481394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * 1= allocate cache lines on 6491394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu * write-through writes. 6501394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu */ 6511394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define CPLB_WT 0x00004000 /* 0=write-back, 1=write-through */ 6521394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 6533bebca2d20796dd3dc62c5d3e74148087c7ce5bdRobin Getz#define CPLB_ALL_ACCESS CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR 6543bebca2d20796dd3dc62c5d3e74148087c7ce5bdRobin Getz 6551394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* TBUFCTL Masks */ 6561394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUFPWR 0x0001 6571394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUFEN 0x0002 6581394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUFOVF 0x0004 6591394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUFCMPLP_SINGLE 0x0008 6601394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUFCMPLP_DOUBLE 0x0010 6611394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUFCMPLP (TBUFCMPLP_SINGLE | TBUFCMPLP_DOUBLE) 6621394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 6631394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* TBUFSTAT Masks */ 6641394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TBUFCNT 0x001F 6651394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 6661394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* ITEST_COMMAND and DTEST_COMMAND Registers */ 6671394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* Masks */ 6681394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_READ 0x00000000 /* Read Access */ 6691394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_WRITE 0x00000002 /* Write Access */ 6701394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_TAG 0x00000000 /* Access TAG */ 6711394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_DATA 0x00000004 /* Access DATA */ 6721394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_DW0 0x00000000 /* Select Double Word 0 */ 6731394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_DW1 0x00000008 /* Select Double Word 1 */ 6741394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_DW2 0x00000010 /* Select Double Word 2 */ 6751394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_DW3 0x00000018 /* Select Double Word 3 */ 6761394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_MB0 0x00000000 /* Select Mini-Bank 0 */ 6771394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_MB1 0x00010000 /* Select Mini-Bank 1 */ 6781394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_MB2 0x00020000 /* Select Mini-Bank 2 */ 6791394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_MB3 0x00030000 /* Select Mini-Bank 3 */ 6801394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_SET(x) ((x << 5) & 0x03E0) /* Set Index 0->31 */ 6811394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_WAY0 0x00000000 /* Access Way0 */ 6821394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_WAY1 0x04000000 /* Access Way1 */ 6831394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* ITEST_COMMAND only */ 6841394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_WAY2 0x08000000 /* Access Way2 */ 6851394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_WAY3 0x0C000000 /* Access Way3 */ 6861394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu/* DTEST_COMMAND only */ 6871394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_BNKSELA 0x00000000 /* Access SuperBank A */ 6881394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#define TEST_BNKSELB 0x00800000 /* Access SuperBank B */ 6891394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu 6901394f03221790a988afc3e4b3cb79f2e477246a9Bryan Wu#endif /* _DEF_LPBLACKFIN_H */ 691