11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* include/asm-m68knommu/MC68VZ328.h: 'VZ328 control registers 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (c) 2000-2001 Lineo Inc. <www.lineo.com> 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (c) 2000-2001 Lineo Canada Corp. <www.lineo.ca> 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1999 Vladimir Gurevich <vgurevic@cisco.com> 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bare & Hare Software, Inc. 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Based on include/asm-m68knommu/MC68332.h 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>, 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The Silver Hammer Group, Ltd. 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * M68VZ328 fixes by Evan Stawnyczy <evan@lineo.com> 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * vz multiport fixes by Michael Leslie <mleslie@lineo.com> 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef _MC68VZ328_H_ 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _MC68VZ328_H_ 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BYTE_REF(addr) (*((volatile unsigned char*)addr)) 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WORD_REF(addr) (*((volatile unsigned short*)addr)) 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LONG_REF(addr) (*((volatile unsigned long*)addr)) 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PUT_FIELD(field, val) (((val) << field##_SHIFT) & field##_MASK) 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define GET_FIELD(reg, field) (((reg) & field##_MASK) >> field##_SHIFT) 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFF0xx -- System Control 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * System Control Register (SCR) 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCR_ADDR 0xfffff000 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCR BYTE_REF(SCR_ADDR) 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCR_WDTH8 0x01 /* 8-Bit Width Select */ 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCR_DMAP 0x04 /* Double Map */ 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCR_SO 0x08 /* Supervisor Only */ 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */ 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCR_PRV 0x20 /* Privilege Violation */ 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCR_WPV 0x40 /* Write Protect Violation */ 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCR_BETO 0x80 /* Bus-Error TimeOut */ 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Silicon ID Register (Mask Revision Register (MRR) for '328 Compatibility) 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MRR_ADDR 0xfffff004 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MRR LONG_REF(MRR_ADDR) 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFF1xx -- Chip-Select logic 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Chip Select Group Base Registers 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSGBA_ADDR 0xfffff100 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSGBB_ADDR 0xfffff102 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSGBC_ADDR 0xfffff104 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSGBD_ADDR 0xfffff106 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSGBA WORD_REF(CSGBA_ADDR) 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSGBB WORD_REF(CSGBB_ADDR) 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSGBC WORD_REF(CSGBC_ADDR) 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSGBD WORD_REF(CSGBD_ADDR) 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Chip Select Registers 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA_ADDR 0xfffff110 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_ADDR 0xfffff112 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_ADDR 0xfffff114 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_ADDR 0xfffff116 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA WORD_REF(CSA_ADDR) 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB WORD_REF(CSB_ADDR) 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC WORD_REF(CSC_ADDR) 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD WORD_REF(CSD_ADDR) 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA_EN 0x0001 /* Chip-Select Enable */ 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA_SIZ_MASK 0x000e /* Chip-Select Size */ 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA_SIZ_SHIFT 1 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA_WS_MASK 0x0070 /* Wait State */ 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA_WS_SHIFT 4 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA_BSW 0x0080 /* Data Bus Width */ 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA_FLASH 0x0100 /* FLASH Memory Support */ 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSA_RO 0x8000 /* Read-Only */ 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_EN 0x0001 /* Chip-Select Enable */ 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_SIZ_MASK 0x000e /* Chip-Select Size */ 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_SIZ_SHIFT 1 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_WS_MASK 0x0070 /* Wait State */ 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_WS_SHIFT 4 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_BSW 0x0080 /* Data Bus Width */ 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_FLASH 0x0100 /* FLASH Memory Support */ 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_UPSIZ_MASK 0x1800 /* Unprotected memory block size */ 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_UPSIZ_SHIFT 11 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_ROP 0x2000 /* Readonly if protected */ 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_SOP 0x4000 /* Supervisor only if protected */ 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSB_RO 0x8000 /* Read-Only */ 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_EN 0x0001 /* Chip-Select Enable */ 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_SIZ_MASK 0x000e /* Chip-Select Size */ 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_SIZ_SHIFT 1 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_WS_MASK 0x0070 /* Wait State */ 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_WS_SHIFT 4 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_BSW 0x0080 /* Data Bus Width */ 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_FLASH 0x0100 /* FLASH Memory Support */ 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_UPSIZ_MASK 0x1800 /* Unprotected memory block size */ 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_UPSIZ_SHIFT 11 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_ROP 0x2000 /* Readonly if protected */ 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_SOP 0x4000 /* Supervisor only if protected */ 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSC_RO 0x8000 /* Read-Only */ 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_EN 0x0001 /* Chip-Select Enable */ 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_SIZ_MASK 0x000e /* Chip-Select Size */ 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_SIZ_SHIFT 1 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_WS_MASK 0x0070 /* Wait State */ 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_WS_SHIFT 4 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_BSW 0x0080 /* Data Bus Width */ 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_FLASH 0x0100 /* FLASH Memory Support */ 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_DRAM 0x0200 /* Dram Selection */ 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_COMB 0x0400 /* Combining */ 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_UPSIZ_MASK 0x1800 /* Unprotected memory block size */ 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_UPSIZ_SHIFT 11 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_ROP 0x2000 /* Readonly if protected */ 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_SOP 0x4000 /* Supervisor only if protected */ 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSD_RO 0x8000 /* Read-Only */ 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Emulation Chip-Select Register 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMUCS_ADDR 0xfffff118 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMUCS WORD_REF(EMUCS_ADDR) 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMUCS_WS_MASK 0x0070 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMUCS_WS_SHIFT 4 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PLL Control Register 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_ADDR 0xfffff200 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR WORD_REF(PLLCR_ADDR) 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_DISPLL 0x0008 /* Disable PLL */ 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_CLKEN 0x0010 /* Clock (CLKO pin) enable */ 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_PRESC 0x0020 /* VCO prescaler */ 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_SYSCLK_SEL_MASK 0x0700 /* System Clock Selection */ 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_SYSCLK_SEL_SHIFT 8 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_LCDCLK_SEL_MASK 0x3800 /* LCD Clock Selection */ 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_LCDCLK_SEL_SHIFT 11 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_PIXCLK_SEL_MASK PLLCR_LCDCLK_SEL_MASK 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLCR_PIXCLK_SEL_SHIFT PLLCR_LCDCLK_SEL_SHIFT 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PLL Frequency Select Register 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLFSR_ADDR 0xfffff202 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLFSR WORD_REF(PLLFSR_ADDR) 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLFSR_PC_MASK 0x00ff /* P Count */ 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLFSR_PC_SHIFT 0 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLFSR_QC_MASK 0x0f00 /* Q Count */ 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLFSR_QC_SHIFT 8 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLFSR_PROT 0x4000 /* Protect P & Q */ 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLLFSR_CLK32 0x8000 /* Clock 32 (kHz) */ 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Power Control Register 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCTRL_ADDR 0xfffff207 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCTRL BYTE_REF(PCTRL_ADDR) 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCTRL_WIDTH_MASK 0x1f /* CPU Clock bursts width */ 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCTRL_WIDTH_SHIFT 0 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCTRL_PCEN 0x80 /* Power Control Enable */ 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFF3xx -- Interrupt Controller 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Interrupt Vector Register 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IVR_ADDR 0xfffff300 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IVR BYTE_REF(IVR_ADDR) 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IVR_VECTOR_MASK 0xF8 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Interrupt control Register 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_ADDR 0xfffff302 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR WORD_REF(ICR_ADDR) 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_POL5 0x0080 /* Polarity Control for IRQ5 */ 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_ET6 0x0100 /* Edge Trigger Select for IRQ6 */ 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_ET3 0x0200 /* Edge Trigger Select for IRQ3 */ 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_ET2 0x0400 /* Edge Trigger Select for IRQ2 */ 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_ET1 0x0800 /* Edge Trigger Select for IRQ1 */ 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_POL6 0x1000 /* Polarity Control for IRQ6 */ 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_POL3 0x2000 /* Polarity Control for IRQ3 */ 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_POL2 0x4000 /* Polarity Control for IRQ2 */ 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICR_POL1 0x8000 /* Polarity Control for IRQ1 */ 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Interrupt Mask Register 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_ADDR 0xfffff304 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR LONG_REF(IMR_ADDR) 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Define the names for bit positions first. This is useful for 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * request_irq 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPI2_IRQ_NUM 0 /* SPI 2 interrupt */ 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TMR_IRQ_NUM 1 /* Timer 1 interrupt */ 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART1_IRQ_NUM 2 /* UART 1 interrupt */ 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WDT_IRQ_NUM 3 /* Watchdog Timer interrupt */ 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTC_IRQ_NUM 4 /* RTC interrupt */ 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TMR2_IRQ_NUM 5 /* Timer 2 interrupt */ 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define KB_IRQ_NUM 6 /* Keyboard Interrupt */ 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWM1_IRQ_NUM 7 /* Pulse-Width Modulator 1 int. */ 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INT0_IRQ_NUM 8 /* External INT0 */ 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INT1_IRQ_NUM 9 /* External INT1 */ 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INT2_IRQ_NUM 10 /* External INT2 */ 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INT3_IRQ_NUM 11 /* External INT3 */ 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART2_IRQ_NUM 12 /* UART 2 interrupt */ 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWM2_IRQ_NUM 13 /* Pulse-Width Modulator 1 int. */ 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IRQ1_IRQ_NUM 16 /* IRQ1 */ 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IRQ2_IRQ_NUM 17 /* IRQ2 */ 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IRQ3_IRQ_NUM 18 /* IRQ3 */ 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IRQ6_IRQ_NUM 19 /* IRQ6 */ 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IRQ5_IRQ_NUM 20 /* IRQ5 */ 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPI1_IRQ_NUM 21 /* SPI 1 interrupt */ 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SAM_IRQ_NUM 22 /* Sampling Timer for RTC */ 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMIQ_IRQ_NUM 23 /* Emulator Interrupt */ 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPI_IRQ_NUM SPI2_IRQ_NUM 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIM_IRQ_NUM SPI_IRQ_NUM 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TMR1_IRQ_NUM TMR_IRQ_NUM 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_IRQ_NUM UART1_IRQ_NUM 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Here go the bitmasks themselves 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MSPI (1 << SPI_IRQ_NUM) /* Mask SPI interrupt */ 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MTMR (1 << TMR_IRQ_NUM) /* Mask Timer interrupt */ 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MUART (1 << UART_IRQ_NUM) /* Mask UART interrupt */ 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MWDT (1 << WDT_IRQ_NUM) /* Mask Watchdog Timer interrupt */ 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MRTC (1 << RTC_IRQ_NUM) /* Mask RTC interrupt */ 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MKB (1 << KB_IRQ_NUM) /* Mask Keyboard Interrupt */ 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MPWM (1 << PWM_IRQ_NUM) /* Mask Pulse-Width Modulator int. */ 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MINT0 (1 << INT0_IRQ_NUM) /* Mask External INT0 */ 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MINT1 (1 << INT1_IRQ_NUM) /* Mask External INT1 */ 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MINT2 (1 << INT2_IRQ_NUM) /* Mask External INT2 */ 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MINT3 (1 << INT3_IRQ_NUM) /* Mask External INT3 */ 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MIRQ1 (1 << IRQ1_IRQ_NUM) /* Mask IRQ1 */ 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MIRQ2 (1 << IRQ2_IRQ_NUM) /* Mask IRQ2 */ 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MIRQ3 (1 << IRQ3_IRQ_NUM) /* Mask IRQ3 */ 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MIRQ6 (1 << IRQ6_IRQ_NUM) /* Mask IRQ6 */ 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MIRQ5 (1 << IRQ5_IRQ_NUM) /* Mask IRQ5 */ 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MSAM (1 << SAM_IRQ_NUM) /* Mask Sampling Timer for RTC */ 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MEMIQ (1 << EMIQ_IRQ_NUM) /* Mask Emulator Interrupt */ 2821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 2841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MSPIM IMR_MSPI 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MTMR1 IMR_MTMR 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Interrupt Status Register 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_ADDR 0xfffff30c 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR LONG_REF(ISR_ADDR) 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_SPI (1 << SPI_IRQ_NUM) /* SPI interrupt */ 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_TMR (1 << TMR_IRQ_NUM) /* Timer interrupt */ 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_RTC (1 << RTC_IRQ_NUM) /* RTC interrupt */ 2981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_KB (1 << KB_IRQ_NUM) /* Keyboard Interrupt */ 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PWM (1 << PWM_IRQ_NUM) /* Pulse-Width Modulator interrupt */ 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_INT0 (1 << INT0_IRQ_NUM) /* External INT0 */ 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */ 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_INT2 (1 << INT2_IRQ_NUM) /* External INT2 */ 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_INT3 (1 << INT3_IRQ_NUM) /* External INT3 */ 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_IRQ1 (1 << IRQ1_IRQ_NUM) /* IRQ1 */ 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */ 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_IRQ3 (1 << IRQ3_IRQ_NUM) /* IRQ3 */ 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_IRQ6 (1 << IRQ6_IRQ_NUM) /* IRQ6 */ 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_IRQ5 (1 << IRQ5_IRQ_NUM) /* IRQ5 */ 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_SAM (1 << SAM_IRQ_NUM) /* Sampling Timer for RTC */ 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_EMIQ (1 << EMIQ_IRQ_NUM) /* Emulator Interrupt */ 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_SPIM ISR_SPI 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_TMR1 ISR_TMR 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Interrupt Pending Register 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_ADDR 0xfffff30c 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR LONG_REF(IPR_ADDR) 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_SPI (1 << SPI_IRQ_NUM) /* SPI interrupt */ 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_TMR (1 << TMR_IRQ_NUM) /* Timer interrupt */ 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_RTC (1 << RTC_IRQ_NUM) /* RTC interrupt */ 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_KB (1 << KB_IRQ_NUM) /* Keyboard Interrupt */ 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_PWM (1 << PWM_IRQ_NUM) /* Pulse-Width Modulator interrupt */ 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_INT0 (1 << INT0_IRQ_NUM) /* External INT0 */ 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */ 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_INT2 (1 << INT2_IRQ_NUM) /* External INT2 */ 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_INT3 (1 << INT3_IRQ_NUM) /* External INT3 */ 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_IRQ1 (1 << IRQ1_IRQ_NUM) /* IRQ1 */ 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */ 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_IRQ3 (1 << IRQ3_IRQ_NUM) /* IRQ3 */ 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_IRQ6 (1 << IRQ6_IRQ_NUM) /* IRQ6 */ 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_IRQ5 (1 << IRQ5_IRQ_NUM) /* IRQ5 */ 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_SAM (1 << SAM_IRQ_NUM) /* Sampling Timer for RTC */ 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_EMIQ (1 << EMIQ_IRQ_NUM) /* Emulator Interrupt */ 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_SPIM IPR_SPI 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPR_TMR1 IPR_TMR 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFF4xx -- Parallel Ports 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port A 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PADIR_ADDR 0xfffff400 /* Port A direction reg */ 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PADATA_ADDR 0xfffff401 /* Port A data register */ 3561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PAPUEN_ADDR 0xfffff402 /* Port A Pull-Up enable reg */ 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PADIR BYTE_REF(PADIR_ADDR) 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PADATA BYTE_REF(PADATA_ADDR) 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PAPUEN BYTE_REF(PAPUEN_ADDR) 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA(x) (1 << (x)) 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port B 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PBDIR_ADDR 0xfffff408 /* Port B direction reg */ 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PBDATA_ADDR 0xfffff409 /* Port B data register */ 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PBPUEN_ADDR 0xfffff40a /* Port B Pull-Up enable reg */ 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PBSEL_ADDR 0xfffff40b /* Port B Select Register */ 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PBDIR BYTE_REF(PBDIR_ADDR) 3731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PBDATA BYTE_REF(PBDATA_ADDR) 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PBPUEN BYTE_REF(PBPUEN_ADDR) 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PBSEL BYTE_REF(PBSEL_ADDR) 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB(x) (1 << (x)) 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_CSB0 0x01 /* Use CSB0 as PB[0] */ 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_CSB1 0x02 /* Use CSB1 as PB[1] */ 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_CSC0_RAS0 0x04 /* Use CSC0/RAS0 as PB[2] */ 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_CSC1_RAS1 0x08 /* Use CSC1/RAS1 as PB[3] */ 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_CSD0_CAS0 0x10 /* Use CSD0/CAS0 as PB[4] */ 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_CSD1_CAS1 0x20 /* Use CSD1/CAS1 as PB[5] */ 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_TIN_TOUT 0x40 /* Use TIN/TOUT as PB[6] */ 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_PWMO 0x80 /* Use PWMO as PB[7] */ 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port C 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCDIR_ADDR 0xfffff410 /* Port C direction reg */ 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCDATA_ADDR 0xfffff411 /* Port C data register */ 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCPDEN_ADDR 0xfffff412 /* Port C Pull-Down enb. reg */ 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCSEL_ADDR 0xfffff413 /* Port C Select Register */ 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCDIR BYTE_REF(PCDIR_ADDR) 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCDATA BYTE_REF(PCDATA_ADDR) 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCPDEN BYTE_REF(PCPDEN_ADDR) 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PCSEL BYTE_REF(PCSEL_ADDR) 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC(x) (1 << (x)) 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_LD0 0x01 /* Use LD0 as PC[0] */ 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_LD1 0x02 /* Use LD1 as PC[1] */ 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_LD2 0x04 /* Use LD2 as PC[2] */ 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_LD3 0x08 /* Use LD3 as PC[3] */ 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_LFLM 0x10 /* Use LFLM as PC[4] */ 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_LLP 0x20 /* Use LLP as PC[5] */ 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_LCLK 0x40 /* Use LCLK as PC[6] */ 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_LACD 0x80 /* Use LACD as PC[7] */ 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port D 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDDIR_ADDR 0xfffff418 /* Port D direction reg */ 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDDATA_ADDR 0xfffff419 /* Port D data register */ 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDPUEN_ADDR 0xfffff41a /* Port D Pull-Up enable reg */ 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDSEL_ADDR 0xfffff41b /* Port D Select Register */ 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDPOL_ADDR 0xfffff41c /* Port D Polarity Register */ 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDIRQEN_ADDR 0xfffff41d /* Port D IRQ enable register */ 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDKBEN_ADDR 0xfffff41e /* Port D Keyboard Enable reg */ 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDIQEG_ADDR 0xfffff41f /* Port D IRQ Edge Register */ 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDDIR BYTE_REF(PDDIR_ADDR) 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDDATA BYTE_REF(PDDATA_ADDR) 4261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDPUEN BYTE_REF(PDPUEN_ADDR) 4271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDSEL BYTE_REF(PDSEL_ADDR) 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDPOL BYTE_REF(PDPOL_ADDR) 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDIRQEN BYTE_REF(PDIRQEN_ADDR) 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDKBEN BYTE_REF(PDKBEN_ADDR) 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PDIQEG BYTE_REF(PDIQEG_ADDR) 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PD(x) (1 << (x)) 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PD_INT0 0x01 /* Use INT0 as PD[0] */ 4361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PD_INT1 0x02 /* Use INT1 as PD[1] */ 4371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PD_INT2 0x04 /* Use INT2 as PD[2] */ 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PD_INT3 0x08 /* Use INT3 as PD[3] */ 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PD_IRQ1 0x10 /* Use IRQ1 as PD[4] */ 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PD_IRQ2 0x20 /* Use IRQ2 as PD[5] */ 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PD_IRQ3 0x40 /* Use IRQ3 as PD[6] */ 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PD_IRQ6 0x80 /* Use IRQ6 as PD[7] */ 4431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port E 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PEDIR_ADDR 0xfffff420 /* Port E direction reg */ 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PEDATA_ADDR 0xfffff421 /* Port E data register */ 4491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PEPUEN_ADDR 0xfffff422 /* Port E Pull-Up enable reg */ 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PESEL_ADDR 0xfffff423 /* Port E Select Register */ 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PEDIR BYTE_REF(PEDIR_ADDR) 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PEDATA BYTE_REF(PEDATA_ADDR) 4541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PEPUEN BYTE_REF(PEPUEN_ADDR) 4551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PESEL BYTE_REF(PESEL_ADDR) 4561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PE(x) (1 << (x)) 4581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PE_SPMTXD 0x01 /* Use SPMTXD as PE[0] */ 4601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PE_SPMRXD 0x02 /* Use SPMRXD as PE[1] */ 4611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PE_SPMCLK 0x04 /* Use SPMCLK as PE[2] */ 4621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PE_DWE 0x08 /* Use DWE as PE[3] */ 4631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PE_RXD 0x10 /* Use RXD as PE[4] */ 4641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PE_TXD 0x20 /* Use TXD as PE[5] */ 4651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PE_RTS 0x40 /* Use RTS as PE[6] */ 4661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PE_CTS 0x80 /* Use CTS as PE[7] */ 4671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port F 4701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PFDIR_ADDR 0xfffff428 /* Port F direction reg */ 4721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PFDATA_ADDR 0xfffff429 /* Port F data register */ 4731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PFPUEN_ADDR 0xfffff42a /* Port F Pull-Up enable reg */ 4741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PFSEL_ADDR 0xfffff42b /* Port F Select Register */ 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PFDIR BYTE_REF(PFDIR_ADDR) 4771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PFDATA BYTE_REF(PFDATA_ADDR) 4781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PFPUEN BYTE_REF(PFPUEN_ADDR) 4791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PFSEL BYTE_REF(PFSEL_ADDR) 4801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PF(x) (1 << (x)) 4821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PF_LCONTRAST 0x01 /* Use LCONTRAST as PF[0] */ 4841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PF_IRQ5 0x02 /* Use IRQ5 as PF[1] */ 4851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PF_CLKO 0x04 /* Use CLKO as PF[2] */ 4861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PF_A20 0x08 /* Use A20 as PF[3] */ 4871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PF_A21 0x10 /* Use A21 as PF[4] */ 4881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PF_A22 0x20 /* Use A22 as PF[5] */ 4891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PF_A23 0x40 /* Use A23 as PF[6] */ 4901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PF_CSA1 0x80 /* Use CSA1 as PF[7] */ 4911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port G 4941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGDIR_ADDR 0xfffff430 /* Port G direction reg */ 4961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGDATA_ADDR 0xfffff431 /* Port G data register */ 4971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGPUEN_ADDR 0xfffff432 /* Port G Pull-Up enable reg */ 4981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGSEL_ADDR 0xfffff433 /* Port G Select Register */ 4991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGDIR BYTE_REF(PGDIR_ADDR) 5011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGDATA BYTE_REF(PGDATA_ADDR) 5021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGPUEN BYTE_REF(PGPUEN_ADDR) 5031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PGSEL BYTE_REF(PGSEL_ADDR) 5041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PG(x) (1 << (x)) 5061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PG_BUSW_DTACK 0x01 /* Use BUSW/DTACK as PG[0] */ 5081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PG_A0 0x02 /* Use A0 as PG[1] */ 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PG_EMUIRQ 0x04 /* Use EMUIRQ as PG[2] */ 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PG_HIZ_P_D 0x08 /* Use HIZ/P/D as PG[3] */ 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PG_EMUCS 0x10 /* Use EMUCS as PG[4] */ 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PG_EMUBRK 0x20 /* Use EMUBRK as PG[5] */ 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port J 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJDIR_ADDR 0xfffff438 /* Port J direction reg */ 5181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJDATA_ADDR 0xfffff439 /* Port J data register */ 5191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJPUEN_ADDR 0xfffff43A /* Port J Pull-Up enb. reg */ 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJSEL_ADDR 0xfffff43B /* Port J Select Register */ 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJDIR BYTE_REF(PJDIR_ADDR) 5231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJDATA BYTE_REF(PJDATA_ADDR) 5241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJPUEN BYTE_REF(PJPUEN_ADDR) 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJSEL BYTE_REF(PJSEL_ADDR) 5261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ(x) (1 << (x)) 5281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port K 5311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKDIR_ADDR 0xfffff440 /* Port K direction reg */ 5331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKDATA_ADDR 0xfffff441 /* Port K data register */ 5341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKPUEN_ADDR 0xfffff442 /* Port K Pull-Up enb. reg */ 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKSEL_ADDR 0xfffff443 /* Port K Select Register */ 5361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKDIR BYTE_REF(PKDIR_ADDR) 5381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKDATA BYTE_REF(PKDATA_ADDR) 5391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKPUEN BYTE_REF(PKPUEN_ADDR) 5401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKSEL BYTE_REF(PKSEL_ADDR) 5411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK(x) (1 << (x)) 5431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK_DATAREADY 0x01 /* Use ~DATA_READY as PK[0] */ 5451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK_PWM2 0x01 /* Use PWM2 as PK[0] */ 5461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK_R_W 0x02 /* Use R/W as PK[1] */ 5471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK_LDS 0x04 /* Use /LDS as PK[2] */ 5481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK_UDS 0x08 /* Use /UDS as PK[3] */ 5491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK_LD4 0x10 /* Use LD4 as PK[4] */ 5501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK_LD5 0x20 /* Use LD5 as PK[5] */ 5511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK_LD6 0x40 /* Use LD6 as PK[6] */ 5521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PK_LD7 0x80 /* Use LD7 as PK[7] */ 5531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJDIR_ADDR 0xfffff438 /* Port J direction reg */ 5551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJDATA_ADDR 0xfffff439 /* Port J data register */ 5561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJPUEN_ADDR 0xfffff43A /* Port J Pull-Up enable reg */ 5571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJSEL_ADDR 0xfffff43B /* Port J Select Register */ 5581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJDIR BYTE_REF(PJDIR_ADDR) 5601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJDATA BYTE_REF(PJDATA_ADDR) 5611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJPUEN BYTE_REF(PJPUEN_ADDR) 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJSEL BYTE_REF(PJSEL_ADDR) 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ(x) (1 << (x)) 5651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ_MOSI 0x01 /* Use MOSI as PJ[0] */ 5671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ_MISO 0x02 /* Use MISO as PJ[1] */ 5681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ_SPICLK1 0x04 /* Use SPICLK1 as PJ[2] */ 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ_SS 0x08 /* Use SS as PJ[3] */ 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ_RXD2 0x10 /* Use RXD2 as PJ[4] */ 5711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ_TXD2 0x20 /* Use TXD2 as PJ[5] */ 5721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ_RTS2 0x40 /* Use RTS2 as PJ[5] */ 5731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PJ_CTS2 0x80 /* Use CTS2 as PJ[5] */ 5741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Port M 5771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMDIR_ADDR 0xfffff448 /* Port M direction reg */ 5791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMDATA_ADDR 0xfffff449 /* Port M data register */ 5801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMPUEN_ADDR 0xfffff44a /* Port M Pull-Up enable reg */ 5811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMSEL_ADDR 0xfffff44b /* Port M Select Register */ 5821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMDIR BYTE_REF(PMDIR_ADDR) 5841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMDATA BYTE_REF(PMDATA_ADDR) 5851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMPUEN BYTE_REF(PMPUEN_ADDR) 5861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMSEL BYTE_REF(PMSEL_ADDR) 5871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PM(x) (1 << (x)) 5891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PM_SDCLK 0x01 /* Use SDCLK as PM[0] */ 5911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PM_SDCE 0x02 /* Use SDCE as PM[1] */ 5921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PM_DQMH 0x04 /* Use DQMH as PM[2] */ 5931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PM_DQML 0x08 /* Use DQML as PM[3] */ 5941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PM_SDA10 0x10 /* Use SDA10 as PM[4] */ 5951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PM_DMOE 0x20 /* Use DMOE as PM[5] */ 5961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 5981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFF5xx -- Pulse-Width Modulator (PWM) 6001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 6011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 6021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PWM Control Register 6051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_ADDR 0xfffff500 6071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC WORD_REF(PWMC_ADDR) 6081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_CLKSEL_MASK 0x0003 /* Clock Selection */ 6101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_CLKSEL_SHIFT 0 6111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_REPEAT_MASK 0x000c /* Sample Repeats */ 6121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_REPEAT_SHIFT 2 6131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_EN 0x0010 /* Enable PWM */ 6141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMNC_FIFOAV 0x0020 /* FIFO Available */ 6151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_IRQEN 0x0040 /* Interrupt Request Enable */ 6161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_IRQ 0x0080 /* Interrupt Request (FIFO empty) */ 6171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_PRESCALER_MASK 0x7f00 /* Incoming Clock prescaler */ 6181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_PRESCALER_SHIFT 8 6191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_CLKSRC 0x8000 /* Clock Source Select */ 6201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 6221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMC_PWMEN PWMC_EN 6231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PWM Sample Register 6261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMS_ADDR 0xfffff502 6281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMS WORD_REF(PWMS_ADDR) 6291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PWM Period Register 6321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMP_ADDR 0xfffff504 6341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMP BYTE_REF(PWMP_ADDR) 6351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PWM Counter Register 6381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMCNT_ADDR 0xfffff505 6401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMCNT BYTE_REF(PWMCNT_ADDR) 6411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 6431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 6441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFF6xx -- General-Purpose Timer 6451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 6461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 6471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Timer Control register 6501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_ADDR 0xfffff600 6521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL WORD_REF(TCTL_ADDR) 6531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_TEN 0x0001 /* Timer Enable */ 6551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_CLKSOURCE_MASK 0x000e /* Clock Source: */ 6561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_CLKSOURCE_STOP 0x0000 /* Stop count (disabled) */ 6571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_CLKSOURCE_SYSCLK 0x0002 /* SYSCLK to prescaler */ 6581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_CLKSOURCE_SYSCLK_16 0x0004 /* SYSCLK/16 to prescaler */ 6591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_CLKSOURCE_TIN 0x0006 /* TIN to prescaler */ 6601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_CLKSOURCE_32KHZ 0x0008 /* 32kHz clock to prescaler */ 6611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_IRQEN 0x0010 /* IRQ Enable */ 6621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_OM 0x0020 /* Output Mode */ 6631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_CAP_MASK 0x00c0 /* Capture Edge: */ 6641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_CAP_RE 0x0040 /* Capture on rizing edge */ 6651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_CAP_FE 0x0080 /* Capture on falling edge */ 6661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL_FRR 0x0010 /* Free-Run Mode */ 6671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 6691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL1_ADDR TCTL_ADDR 6701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCTL1 TCTL 6711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Timer Prescaler Register 6741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TPRER_ADDR 0xfffff602 6761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TPRER WORD_REF(TPRER_ADDR) 6771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 6791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TPRER1_ADDR TPRER_ADDR 6801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TPRER1 TPRER 6811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Timer Compare Register 6841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCMP_ADDR 0xfffff604 6861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCMP WORD_REF(TCMP_ADDR) 6871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 6891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCMP1_ADDR TCMP_ADDR 6901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCMP1 TCMP 6911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Timer Capture register 6941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR_ADDR 0xfffff606 6961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR WORD_REF(TCR_ADDR) 6971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 6991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR1_ADDR TCR_ADDR 7001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR1 TCR 7011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Timer Counter Register 7041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCN_ADDR 0xfffff608 7061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCN WORD_REF(TCN_ADDR) 7071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 7091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCN1_ADDR TCN_ADDR 7101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCN1 TCN 7111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Timer Status Register 7141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TSTAT_ADDR 0xfffff60a 7161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TSTAT WORD_REF(TSTAT_ADDR) 7171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TSTAT_COMP 0x0001 /* Compare Event occurred */ 7191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TSTAT_CAPT 0x0001 /* Capture Event occurred */ 7201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 7221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TSTAT1_ADDR TSTAT_ADDR 7231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TSTAT1 TSTAT 7241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 7261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFF8xx -- Serial Periferial Interface Master (SPIM) 7281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 7301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * SPIM Data Register 7331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMDATA_ADDR 0xfffff800 7351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMDATA WORD_REF(SPIMDATA_ADDR) 7361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * SPIM Control/Status Register 7391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_ADDR 0xfffff802 7411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT WORD_REF(SPIMCONT_ADDR) 7421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_BIT_COUNT_MASK 0x000f /* Transfer Length in Bytes */ 7441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_BIT_COUNT_SHIFT 0 7451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_POL 0x0010 /* SPMCLK Signel Polarity */ 7461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_PHA 0x0020 /* Clock/Data phase relationship */ 7471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_IRQEN 0x0040 /* IRQ Enable */ 7481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_IRQ 0x0080 /* Interrupt Request */ 7491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_XCH 0x0100 /* Exchange */ 7501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_ENABLE 0x0200 /* Enable SPIM */ 7511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_DATA_RATE_MASK 0xe000 /* SPIM Data Rate */ 7521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_DATA_RATE_SHIFT 13 7531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 7551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_SPIMIRQ SPIMCONT_IRQ 7561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPIMCONT_SPIMEN SPIMCONT_ENABLE 7571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 7591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFF9xx -- UART 7611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 7631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * UART Status/Control Register 7661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_ADDR 0xfffff900 7691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT WORD_REF(USTCNT_ADDR) 7701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_TXAE 0x0001 /* Transmitter Available Interrupt Enable */ 7721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_TXHE 0x0002 /* Transmitter Half Empty Enable */ 7731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_TXEE 0x0004 /* Transmitter Empty Interrupt Enable */ 7741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_RXRE 0x0008 /* Receiver Ready Interrupt Enable */ 7751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_RXHE 0x0010 /* Receiver Half-Full Interrupt Enable */ 7761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_RXFE 0x0020 /* Receiver Full Interrupt Enable */ 7771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_CTSD 0x0040 /* CTS Delta Interrupt Enable */ 7781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_ODEN 0x0080 /* Old Data Interrupt Enable */ 7791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_8_7 0x0100 /* Eight or seven-bit transmission */ 7801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_STOP 0x0200 /* Stop bit transmission */ 7811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_ODD 0x0400 /* Odd Parity */ 7821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_PEN 0x0800 /* Parity Enable */ 7831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_CLKM 0x1000 /* Clock Mode Select */ 7841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_TXEN 0x2000 /* Transmitter Enable */ 7851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_RXEN 0x4000 /* Receiver Enable */ 7861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_UEN 0x8000 /* UART Enable */ 7871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 7891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_TXAVAILEN USTCNT_TXAE 7901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_TXHALFEN USTCNT_TXHE 7911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_TXEMPTYEN USTCNT_TXEE 7921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_RXREADYEN USTCNT_RXRE 7931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_RXHALFEN USTCNT_RXHE 7941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_RXFULLEN USTCNT_RXFE 7951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_CTSDELTAEN USTCNT_CTSD 7961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_ODD_EVEN USTCNT_ODD 7971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_PARITYEN USTCNT_PEN 7981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_CLKMODE USTCNT_CLKM 7991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define USTCNT_UARTEN USTCNT_UEN 8001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * UART Baud Control Register 8031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UBAUD_ADDR 0xfffff902 8051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UBAUD WORD_REF(UBAUD_ADDR) 8061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UBAUD_PRESCALER_MASK 0x003f /* Actual divisor is 65 - PRESCALER */ 8081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UBAUD_PRESCALER_SHIFT 0 8091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UBAUD_DIVIDE_MASK 0x0700 /* Baud Rate freq. divizor */ 8101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UBAUD_DIVIDE_SHIFT 8 8111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UBAUD_BAUD_SRC 0x0800 /* Baud Rate Source */ 8121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UBAUD_UCLKDIR 0x2000 /* UCLK Direction */ 8131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * UART Receiver Register 8161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_ADDR 0xfffff904 8181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX WORD_REF(URX_ADDR) 8191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_RXDATA_ADDR 0xfffff905 8211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_RXDATA BYTE_REF(URX_RXDATA_ADDR) 8221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_RXDATA_MASK 0x00ff /* Received data */ 8241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_RXDATA_SHIFT 0 8251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_PARITY_ERROR 0x0100 /* Parity Error */ 8261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_BREAK 0x0200 /* Break Detected */ 8271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_FRAME_ERROR 0x0400 /* Framing Error */ 8281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_OVRUN 0x0800 /* Serial Overrun */ 8291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_OLD_DATA 0x1000 /* Old data in FIFO */ 8301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_DATA_READY 0x2000 /* Data Ready (FIFO not empty) */ 8311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_FIFO_HALF 0x4000 /* FIFO is Half-Full */ 8321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define URX_FIFO_FULL 0x8000 /* FIFO is Full */ 8331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * UART Transmitter Register 8361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_ADDR 0xfffff906 8381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX WORD_REF(UTX_ADDR) 8391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_TXDATA_ADDR 0xfffff907 8411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_TXDATA BYTE_REF(UTX_TXDATA_ADDR) 8421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_TXDATA_MASK 0x00ff /* Data to be transmitted */ 8441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_TXDATA_SHIFT 0 8451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_CTS_DELTA 0x0100 /* CTS changed */ 8461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_CTS_STAT 0x0200 /* CTS State */ 8471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_BUSY 0x0400 /* FIFO is busy, sending a character */ 8481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_NOCTS 0x0800 /* Ignore CTS */ 8491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_SEND_BREAK 0x1000 /* Send a BREAK */ 8501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_TX_AVAIL 0x2000 /* Transmit FIFO has a slot available */ 8511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_FIFO_HALF 0x4000 /* Transmit FIFO is half empty */ 8521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_FIFO_EMPTY 0x8000 /* Transmit FIFO is empty */ 8531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 8551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_CTS_STATUS UTX_CTS_STAT 8561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UTX_IGNORE_CTS UTX_NOCTS 8571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * UART Miscellaneous Register 8601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_ADDR 0xfffff908 8621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC WORD_REF(UMISC_ADDR) 8631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_TX_POL 0x0004 /* Transmit Polarity */ 8651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_RX_POL 0x0008 /* Receive Polarity */ 8661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_IRDA_LOOP 0x0010 /* IrDA Loopback Enable */ 8671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_IRDA_EN 0x0020 /* Infra-Red Enable */ 8681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_RTS 0x0040 /* Set RTS status */ 8691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_RTSCONT 0x0080 /* Choose RTS control */ 8701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_IR_TEST 0x0400 /* IRDA Test Enable */ 8711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_BAUD_RESET 0x0800 /* Reset Baud Rate Generation Counters */ 8721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_LOOP 0x1000 /* Serial Loopback Enable */ 8731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_FORCE_PERR 0x2000 /* Force Parity Error */ 8741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_CLKSRC 0x4000 /* Clock Source */ 8751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UMISC_BAUD_TEST 0x8000 /* Enable Baud Test Mode */ 8761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * UART Non-integer Prescaler Register 8791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define NIPR_ADDR 0xfffff90a 8811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define NIPR WORD_REF(NIPR_ADDR) 8821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define NIPR_STEP_VALUE_MASK 0x00ff /* NI prescaler step value */ 8841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define NIPR_STEP_VALUE_SHIFT 0 8851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define NIPR_SELECT_MASK 0x0700 /* Tap Selection */ 8861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define NIPR_SELECT_SHIFT 8 8871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define NIPR_PRE_SEL 0x8000 /* Non-integer prescaler select */ 8881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* generalization of uart control registers to support multiple ports: */ 8911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct { 8921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short int ustcnt; 8931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short int ubaud; 8941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds union { 8951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short int w; 8961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct { 8971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned char status; 8981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned char rxdata; 8991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } b; 9001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } urx; 9011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds union { 9021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short int w; 9031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct { 9041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned char status; 9051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned char txdata; 9061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } b; 9071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } utx; 9081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short int umisc; 9091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short int nipr; 9101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short int hmark; 9111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short int unused; 912f78fc874f42f63a460bcebc2aeb98db526280d1cVinay K Nallamothu} __attribute__((packed)) m68328_uart; 9131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 9181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFFAxx -- LCD Controller 9201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 9221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Screen Starting Address Register 9251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LSSA_ADDR 0xfffffa00 9271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LSSA LONG_REF(LSSA_ADDR) 9281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LSSA_SSA_MASK 0x1ffffffe /* Bits 0 and 29-31 are reserved */ 9301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Virtual Page Width Register 9331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LVPW_ADDR 0xfffffa05 9351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LVPW BYTE_REF(LVPW_ADDR) 9361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Screen Width Register (not compatible with '328 !!!) 9391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LXMAX_ADDR 0xfffffa08 9411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LXMAX WORD_REF(LXMAX_ADDR) 9421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LXMAX_XM_MASK 0x02f0 /* Bits 0-3 and 10-15 are reserved */ 9441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Screen Height Register 9471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LYMAX_ADDR 0xfffffa0a 9491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LYMAX WORD_REF(LYMAX_ADDR) 9501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LYMAX_YM_MASK 0x01ff /* Bits 9-15 are reserved */ 9521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Cursor X Position Register 9551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCXP_ADDR 0xfffffa18 9571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCXP WORD_REF(LCXP_ADDR) 9581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCXP_CC_MASK 0xc000 /* Cursor Control */ 9601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCXP_CC_TRAMSPARENT 0x0000 9611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCXP_CC_BLACK 0x4000 9621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCXP_CC_REVERSED 0x8000 9631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCXP_CC_WHITE 0xc000 9641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCXP_CXP_MASK 0x02ff /* Cursor X position */ 9651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Cursor Y Position Register 9681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCYP_ADDR 0xfffffa1a 9701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCYP WORD_REF(LCYP_ADDR) 9711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCYP_CYP_MASK 0x01ff /* Cursor Y Position */ 9731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Cursor Width and Heigth Register 9761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCWCH_ADDR 0xfffffa1c 9781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCWCH WORD_REF(LCWCH_ADDR) 9791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCWCH_CH_MASK 0x001f /* Cursor Height */ 9811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCWCH_CH_SHIFT 0 9821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCWCH_CW_MASK 0x1f00 /* Cursor Width */ 9831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCWCH_CW_SHIFT 8 9841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Blink Control Register 9871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LBLKC_ADDR 0xfffffa1f 9891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LBLKC BYTE_REF(LBLKC_ADDR) 9901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LBLKC_BD_MASK 0x7f /* Blink Divisor */ 9921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LBLKC_BD_SHIFT 0 9931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LBLKC_BKEN 0x80 /* Blink Enabled */ 9941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Panel Interface Configuration Register 9971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF_ADDR 0xfffffa20 9991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF BYTE_REF(LPICF_ADDR) 10001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF_GS_MASK 0x03 /* Gray-Scale Mode */ 10021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF_GS_BW 0x00 10031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF_GS_GRAY_4 0x01 10041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF_GS_GRAY_16 0x02 10051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF_PBSIZ_MASK 0x0c /* Panel Bus Width */ 10061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF_PBSIZ_1 0x00 10071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF_PBSIZ_2 0x04 10081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPICF_PBSIZ_4 0x08 10091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 10111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Polarity Configuration Register 10121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOLCF_ADDR 0xfffffa21 10141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOLCF BYTE_REF(LPOLCF_ADDR) 10151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOLCF_PIXPOL 0x01 /* Pixel Polarity */ 10171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOLCF_LPPOL 0x02 /* Line Pulse Polarity */ 10181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOLCF_FLMPOL 0x04 /* Frame Marker Polarity */ 10191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOLCF_LCKPOL 0x08 /* LCD Shift Lock Polarity */ 10201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 10221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LACD (LCD Alternate Crystal Direction) Rate Control Register 10231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LACDRC_ADDR 0xfffffa23 10251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LACDRC BYTE_REF(LACDRC_ADDR) 10261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LACDRC_ACDSLT 0x80 /* Signal Source Select */ 10281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LACDRC_ACD_MASK 0x0f /* Alternate Crystal Direction Control */ 10291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LACDRC_ACD_SHIFT 0 10301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 10321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Pixel Clock Divider Register 10331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPXCD_ADDR 0xfffffa25 10351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPXCD BYTE_REF(LPXCD_ADDR) 10361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPXCD_PCD_MASK 0x3f /* Pixel Clock Divider */ 10381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPXCD_PCD_SHIFT 0 10391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 10411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Clocking Control Register 10421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCKCON_ADDR 0xfffffa27 10441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCKCON BYTE_REF(LCKCON_ADDR) 10451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCKCON_DWS_MASK 0x0f /* Display Wait-State */ 10471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCKCON_DWS_SHIFT 0 10481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCKCON_DWIDTH 0x40 /* Display Memory Width */ 10491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCKCON_LCDON 0x80 /* Enable LCD Controller */ 10501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 10521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCKCON_DW_MASK LCKCON_DWS_MASK 10531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LCKCON_DW_SHIFT LCKCON_DWS_SHIFT 10541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 10561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Refresh Rate Adjustment Register 10571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LRRA_ADDR 0xfffffa29 10591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LRRA BYTE_REF(LRRA_ADDR) 10601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 10621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Panning Offset Register 10631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOSR_ADDR 0xfffffa2d 10651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOSR BYTE_REF(LPOSR_ADDR) 10661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOSR_POS_MASK 0x0f /* Pixel Offset Code */ 10681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LPOSR_POS_SHIFT 0 10691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 10711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Frame Rate Control Modulation Register 10721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LFRCM_ADDR 0xfffffa31 10741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LFRCM BYTE_REF(LFRCM_ADDR) 10751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LFRCM_YMOD_MASK 0x0f /* Vertical Modulation */ 10771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LFRCM_YMOD_SHIFT 0 10781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LFRCM_XMOD_MASK 0xf0 /* Horizontal Modulation */ 10791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LFRCM_XMOD_SHIFT 4 10801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 10821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * LCD Gray Palette Mapping Register 10831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LGPMR_ADDR 0xfffffa33 10851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LGPMR BYTE_REF(LGPMR_ADDR) 10861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LGPMR_G1_MASK 0x0f 10881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LGPMR_G1_SHIFT 0 10891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LGPMR_G2_MASK 0xf0 10901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LGPMR_G2_SHIFT 4 10911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 10931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PWM Contrast Control Register 10941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMR_ADDR 0xfffffa36 10961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMR WORD_REF(PWMR_ADDR) 10971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMR_PW_MASK 0x00ff /* Pulse Width */ 10991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMR_PW_SHIFT 0 11001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMR_CCPEN 0x0100 /* Contrast Control Enable */ 11011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMR_SRC_MASK 0x0600 /* Input Clock Source */ 11021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMR_SRC_LINE 0x0000 /* Line Pulse */ 11031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMR_SRC_PIXEL 0x0200 /* Pixel Clock */ 11041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWMR_SRC_LCD 0x4000 /* LCD clock */ 11051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 11071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 11081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFFBxx -- Real-Time Clock (RTC) 11091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 11101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 11111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 11131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * RTC Hours Minutes and Seconds Register 11141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCTIME_ADDR 0xfffffb00 11161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCTIME LONG_REF(RTCTIME_ADDR) 11171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCTIME_SECONDS_MASK 0x0000003f /* Seconds */ 11191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCTIME_SECONDS_SHIFT 0 11201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCTIME_MINUTES_MASK 0x003f0000 /* Minutes */ 11211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCTIME_MINUTES_SHIFT 16 11221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCTIME_HOURS_MASK 0x1f000000 /* Hours */ 11231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCTIME_HOURS_SHIFT 24 11241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 11261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * RTC Alarm Register 11271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCALRM_ADDR 0xfffffb04 11291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCALRM LONG_REF(RTCALRM_ADDR) 11301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCALRM_SECONDS_MASK 0x0000003f /* Seconds */ 11321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCALRM_SECONDS_SHIFT 0 11331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCALRM_MINUTES_MASK 0x003f0000 /* Minutes */ 11341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCALRM_MINUTES_SHIFT 16 11351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCALRM_HOURS_MASK 0x1f000000 /* Hours */ 11361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCALRM_HOURS_SHIFT 24 11371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 11391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Watchdog Timer Register 11401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WATCHDOG_ADDR 0xfffffb0a 11421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WATCHDOG WORD_REF(WATCHDOG_ADDR) 11431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WATCHDOG_EN 0x0001 /* Watchdog Enabled */ 11451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WATCHDOG_ISEL 0x0002 /* Select the watchdog interrupt */ 11466c655db070ad0e43f66b45fed4c526d6aac07107Justin P. Mattock#define WATCHDOG_INTF 0x0080 /* Watchdog interrupt occurred */ 11471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WATCHDOG_CNT_MASK 0x0300 /* Watchdog Counter */ 11481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WATCHDOG_CNT_SHIFT 8 11491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 11511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * RTC Control Register 11521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCCTL_ADDR 0xfffffb0c 11541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCCTL WORD_REF(RTCCTL_ADDR) 11551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCCTL_XTL 0x0020 /* Crystal Selection */ 11571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCCTL_EN 0x0080 /* RTC Enable */ 11581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* '328-compatible definitions */ 11601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCCTL_384 RTCCTL_XTL 11611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCCTL_ENABLE RTCCTL_EN 11621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 11641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * RTC Interrupt Status Register 11651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_ADDR 0xfffffb0e 11671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR WORD_REF(RTCISR_ADDR) 11681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_SW 0x0001 /* Stopwatch timed out */ 11701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_MIN 0x0002 /* 1-minute interrupt has occurred */ 11711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_ALM 0x0004 /* Alarm interrupt has occurred */ 11721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_DAY 0x0008 /* 24-hour rollover interrupt has occurred */ 11731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_1HZ 0x0010 /* 1Hz interrupt has occurred */ 11741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_HR 0x0020 /* 1-hour interrupt has occurred */ 11751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_SAM0 0x0100 /* 4Hz / 4.6875Hz interrupt has occurred */ 11761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_SAM1 0x0200 /* 8Hz / 9.3750Hz interrupt has occurred */ 11771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_SAM2 0x0400 /* 16Hz / 18.7500Hz interrupt has occurred */ 11781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_SAM3 0x0800 /* 32Hz / 37.5000Hz interrupt has occurred */ 11791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_SAM4 0x1000 /* 64Hz / 75.0000Hz interrupt has occurred */ 11801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_SAM5 0x2000 /* 128Hz / 150.0000Hz interrupt has occurred */ 11811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_SAM6 0x4000 /* 256Hz / 300.0000Hz interrupt has occurred */ 11821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCISR_SAM7 0x8000 /* 512Hz / 600.0000Hz interrupt has occurred */ 11831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 11851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * RTC Interrupt Enable Register 11861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_ADDR 0xfffffb10 11881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR WORD_REF(RTCIENR_ADDR) 11891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_SW 0x0001 /* Stopwatch interrupt enable */ 11911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_MIN 0x0002 /* 1-minute interrupt enable */ 11921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_ALM 0x0004 /* Alarm interrupt enable */ 11931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_DAY 0x0008 /* 24-hour rollover interrupt enable */ 11941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_1HZ 0x0010 /* 1Hz interrupt enable */ 11951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_HR 0x0020 /* 1-hour interrupt enable */ 11961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_SAM0 0x0100 /* 4Hz / 4.6875Hz interrupt enable */ 11971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_SAM1 0x0200 /* 8Hz / 9.3750Hz interrupt enable */ 11981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_SAM2 0x0400 /* 16Hz / 18.7500Hz interrupt enable */ 11991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_SAM3 0x0800 /* 32Hz / 37.5000Hz interrupt enable */ 12001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_SAM4 0x1000 /* 64Hz / 75.0000Hz interrupt enable */ 12011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_SAM5 0x2000 /* 128Hz / 150.0000Hz interrupt enable */ 12021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_SAM6 0x4000 /* 256Hz / 300.0000Hz interrupt enable */ 12031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RTCIENR_SAM7 0x8000 /* 512Hz / 600.0000Hz interrupt enable */ 12041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Stopwatch Minutes Register 12071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define STPWCH_ADDR 0xfffffb12 12091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define STPWCH WORD_REF(STPWCH_ADDR) 12101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define STPWCH_CNT_MASK 0x003f /* Stopwatch countdown value */ 12121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SPTWCH_CNT_SHIFT 0 12131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * RTC Day Count Register 12161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DAYR_ADDR 0xfffffb1a 12181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DAYR WORD_REF(DAYR_ADDR) 12191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DAYR_DAYS_MASK 0x1ff /* Day Setting */ 12211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DAYR_DAYS_SHIFT 0 12221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * RTC Day Alarm Register 12251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DAYALARM_ADDR 0xfffffb1c 12271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DAYALARM WORD_REF(DAYALARM_ADDR) 12281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DAYALARM_DAYSAL_MASK 0x01ff /* Day Setting of the Alarm */ 12301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DAYALARM_DAYSAL_SHIFT 0 12311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 12331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFFCxx -- DRAM Controller 12351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 12371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * DRAM Memory Configuration Register 12401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ADDR 0xfffffc00 12421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC WORD_REF(DRAMMC_ADDR) 12431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW12_MASK 0xc000 /* Row address bit for MD12 */ 12451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW12_PA10 0x0000 12461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW12_PA21 0x4000 12471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW12_PA23 0x8000 12481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW0_MASK 0x3000 /* Row address bit for MD0 */ 12491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW0_PA11 0x0000 12501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW0_PA22 0x1000 12511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW0_PA23 0x2000 12521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW11 0x0800 /* Row address bit for MD11 PA20/PA22 */ 12531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW10 0x0400 /* Row address bit for MD10 PA19/PA21 */ 12541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW9 0x0200 /* Row address bit for MD9 PA9/PA19 */ 12551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_ROW8 0x0100 /* Row address bit for MD8 PA10/PA20 */ 12561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_COL10 0x0080 /* Col address bit for MD10 PA11/PA0 */ 12571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_COL9 0x0040 /* Col address bit for MD9 PA10/PA0 */ 12581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_COL8 0x0020 /* Col address bit for MD8 PA9/PA0 */ 12591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_REF_MASK 0x001f /* Reresh Cycle */ 12601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMMC_REF_SHIFT 0 12611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * DRAM Control Register 12641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_ADDR 0xfffffc02 12661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC WORD_REF(DRAMC_ADDR) 12671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_DWE 0x0001 /* DRAM Write Enable */ 12691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_RST 0x0002 /* Reset Burst Refresh Enable */ 12701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_LPR 0x0004 /* Low-Power Refresh Enable */ 12711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_SLW 0x0008 /* Slow RAM */ 12721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_LSP 0x0010 /* Light Sleep */ 12731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_MSW 0x0020 /* Slow Multiplexing */ 12741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_WS_MASK 0x00c0 /* Wait-states */ 12751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_WS_SHIFT 6 12761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_PGSZ_MASK 0x0300 /* Page Size for fast page mode */ 12771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_PGSZ_SHIFT 8 12781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_PGSZ_256K 0x0000 12791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_PGSZ_512K 0x0100 12801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_PGSZ_1024K 0x0200 12811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_PGSZ_2048K 0x0300 12821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_EDO 0x0400 /* EDO DRAM */ 12831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_CLK 0x0800 /* Refresh Timer Clock source select */ 12841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_BC_MASK 0x3000 /* Page Access Clock Cycle (FP mode) */ 12851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_BC_SHIFT 12 12861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_RM 0x4000 /* Refresh Mode */ 12871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRAMC_EN 0x8000 /* DRAM Controller enable */ 12881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/********** 12911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0xFFFFFDxx -- In-Circuit Emulation (ICE) 12931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds **********/ 12951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ICE Module Address Compare Register 12981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMACR_ADDR 0xfffffd00 13001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMACR LONG_REF(ICEMACR_ADDR) 13011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 13031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ICE Module Address Mask Register 13041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMAMR_ADDR 0xfffffd04 13061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMAMR LONG_REF(ICEMAMR_ADDR) 13071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 13091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ICE Module Control Compare Register 13101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCCR_ADDR 0xfffffd08 13121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCCR WORD_REF(ICEMCCR_ADDR) 13131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCCR_PD 0x0001 /* Program/Data Cycle Selection */ 13151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCCR_RW 0x0002 /* Read/Write Cycle Selection */ 13161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 13181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ICE Module Control Mask Register 13191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCMR_ADDR 0xfffffd0a 13211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCMR WORD_REF(ICEMCMR_ADDR) 13221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCMR_PDM 0x0001 /* Program/Data Cycle Mask */ 13241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCMR_RWM 0x0002 /* Read/Write Cycle Mask */ 13251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 13271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ICE Module Control Register 13281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCR_ADDR 0xfffffd0c 13301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCR WORD_REF(ICEMCR_ADDR) 13311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCR_CEN 0x0001 /* Compare Enable */ 13331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCR_PBEN 0x0002 /* Program Break Enable */ 13341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCR_SB 0x0004 /* Single Breakpoint */ 13351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCR_HMDIS 0x0008 /* HardMap disable */ 13361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMCR_BBIEN 0x0010 /* Bus Break Interrupt Enable */ 13371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 13391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ICE Module Status Register 13401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMSR_ADDR 0xfffffd0e 13421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMSR WORD_REF(ICEMSR_ADDR) 13431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMSR_EMUEN 0x0001 /* Emulation Enable */ 13451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMSR_BRKIRQ 0x0002 /* A-Line Vector Fetch Detected */ 13461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMSR_BBIRQ 0x0004 /* Bus Break Interrupt Detected */ 13471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ICEMSR_EMIRQ 0x0008 /* EMUIRQ Falling Edge Detected */ 13481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* _MC68VZ328_H_ */ 1350